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What is SuperFlash® Technology?

Conventional Flash and Split Gate SuperFlash Technology Diagrams

SuperFlash® technology is an innovative and versatile type of NOR Flash. SuperFlash technology uses a proprietary split-gate cell architecture which provides superior performance, data retention, and reliability over conventional stacked gate Flash.
Watch the video below to learn more about the differences between SuperFlash and conventional Flash memory cells:

Industry's Fastest Erase Times

The unique split gate cell design allows products with SuperFlash technology to provide the fastest sector, block, and chip erase times available. While a typical 64 Mb Flash can take as long as 100 seconds to perform a full chip erase, the equivalent products with SuperFlash technology can complete the same operation in less than 100 ms.

Maximum Chip Erase Time

As shown in the above figure, chip erase times become more significant as the density increases in competitor devices. With SuperFlash technology, the chip erase remains extremely fast regardless of density. “Over-erase” is a condition which affects traditional stacked gate Flash. An over-erased cell creates a leakage current path between the drain and floating gate, which can result in read failures. In order to combat this effect, stacked gate Flash requires multiple erase pulses, “soft-programming” and erase verification cycles in order to ensure a tight threshold voltage window of the Flash cell. “Over-erase” and the resulting cell leakage does not affect the split gate cell design of SuperFlash technology because the floating gate is isolated from the drain. Therefore the additional soft-program and erase verify steps during cell erase are not required with SuperFlash technology. The result is a Flash memory that can perform a full chip erase up to 1,000 times faster than typical Flash.

High Reliability and Data Retention

SuperFlash technology utilizes a much thicker oxide layer than traditional stacked gate Flash. The thicker oxide layer is much less susceptible to defects and damage which can create a leakage path and eventual cell data loss. Notice that the floating gate of the SuperFlash technology cell also has a hook or notch at the edge. This hook creates a strong electric field which improves the performance and reliability of erase operations.

Resources

Technical Briefs

TitleDate PublishedSize
SST25VF064C to SST26VF064B/064BA Migration11/05/14111 KB

Flash Development Tools

TitlePart NumberDescription
Serial SuperFlash® Kit 2AC243008The Serial SuperFlash® Kit 2 allows evaluation of Microchip's Serial Flash Devices which are made using the SST SuperFlash® technology.Buy Now
SQI SuperFlash® Kit 1AC243009The SQI SuperFlash Kit 1 contains three Serial Flash Daughter Boards.Buy Now
Parallel SuperFlash Technology Kit 1AC243006-1This evaluation kit contains two Parallel Flash PICtail™ Plus Daughter Boards which are designed to interface with the PICtail Plus connector on the Explorer 16 Development Board.Buy Now