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Data Security

Data at rest or in transit should exhibit the properties of Confidentiality, Integrity, and Authenticity (CIA). Our data security FPGAs provide all the elements for you to craft a secure design using the principals of CIA on top of our secure hardware and design security capabilities.

Security Leadership

Features PolarFire SoC Competitor 1 Competitor 2 Competitor 3
TRNG Hard-IP (SP800-90A CTR_DRBG-256; SP800-90B (draft) NRBG)

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Soft-IP
AES AES-128/192/256 (ECB, CBC, CTR, OFB, CFB, GCM, KeyWrap) AES-256 (CBC) AES-256 (CBC) AES-256 (ECB, GCM)
SHA SHA-1/224/256/384/512, Key Tree SHA-256 SHA-256 SHA-384
HMAC HMAC-SHA-1/224/256/384/512; GMAC-AES; CMAC-AES HMAC-SHA2-256 HMAC-SHA2-256 ×
RSA SigGen (ANSI X9.31, PKCS v1.5), SigVer (ANSI X9.31, PKCS v1.5)-1024/1536/2048/3072/4096 Soft-RSA –(2048),
SigGen(PKCS v1.5),
SigVer (PKCS v1.5)		 Soft-RSA –(2048),
SigGen(PKCS v1.5),
SigVer (PKCS v1.5)		 Software library:
RSA primitive (2048)
ECDSA KeyGen, KeyVer, SigGen & SigVer - NIST & Brainpool (P256/384/521); KAS - ECC CDH, PKG, PKV × × ×
FFC KAS - DH, DSA SigGen & SigVer (1024/1536/2048/3072/4096) × × ×
Tamper Sense Voltage, Temperature, Clock Frequency, Clock Glitch, Active Mesh × × Only Voltage and Temperature
PUF PUF protection for Secure Key storage (Secure Boot and Data communication) × × For secure boot key
Bitstream Protection DPA resistant Encrypted bit-stream programming × × ✔
DPA Resistance DPA resistant hard crypto co-processor supporting all above Crypto algorithms × × ×

Physical Memory Protection (PMP)

PMP is implemented in each of the PolarFire SoC FPGA’s processor cores. PMP is used to enforce memory access restrictions in conjunction with the machine's privilege state (machine mode, supervisor mode and user mode).