Axcelerator FPGAs
Achieve ASIC-like performance across up to 2 million equivalent system gates with the Axcelerator family of FPGAs. Utilizing the AX architecture, Axcelerator devices streamline development through system-level features such as design security, embedded SRAM (with embedded FIFO control logic), PLLs, segmentable clocks, chip-wide highway routing and carry logic.
- Nonvolatile, high-speed antifuse FPGAs
- 125K–2M system gates
- 350 MHz system performance
- 0.15 µm, CMOS antifuse process
eX FPGAs
Reduce design time and cost for wired and mobile e-appliances through the focused combination of features in eX FPGAs. Meet all of your power, speed, package and price requirements by replacing traditional low-density ASIC implementations in flexible single-chip FPGAs, without the long lead times and costly Non-Recurring Engineering (NRE) charges.
- Low-power, low-density antifuse FPGAs
- 3K–12K system gates
- 350 MHz system performance
- 0.22 µm CMOS antifuse process
MX FPGAs
Integrate your legacy PLDs into a single, low-cost device using MX FPGAs. This high-volume platform improves system cost and reduces complexity without compromising on cost and time. Featuring very low power consumption and the industry's highest design security, MX FPGAs offer you a reliable, single-chip ASIC alternative.
- Mixed-voltage and 5 V-only operation
- 3K–54K system gates
- 250 MHz system performance
- Dual-port SRAM modules and multiplex I/O
SX-A FPGAs
Design with SX-A devices to generate system-wide savings. They integrate multiple functions into a low-cost, single-chip solution. Providing a combination of ASIC performance, security, and low power, SX-A can balance your design tradeoffs while providing a solution that is highly secure from reverse engineering.
- Sea-of-modules antifuse FPGAs
- 12K–108K system gates
- 250 MHz system performance
- 66 MHz PCI compliant
