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The Axcelerator Family of Antifuse FPGAs


Axcelerator, our antifuse family of FPGAs, offers high performance and unprecedented design security at densities of up to 2 million equivalent system gates.

Utilizing our AX architecture, Axcelerator devices have several system-level features, such as embedded SRAM (with embedded FIFO control logic), PLLs, segmentable clocks, chip-wide highway routing and the ability to carry logic.

Developed with a CMOS antifuse process technology based on 0.15 µm and seven layers of metal, Axcelerator devices offer a level of performance previously only available in ASIC technology.

Key Benefits of Axcelerator FPGAs


  • 350 MHz system performance
  • 500+ MHz internal performance
  • 500+ MHz embedded FIFOs
  • PLL output up to 1 GHz and eight PLLs per device
  • Six levels of logic at 156+ MHz
  • 1.5V, 1.8V, 2.5V and 3.3V mixed-voltage operation
  • Eight Input/Output (I/O) banks per device
  • Eight global clocks per device
  • 4.5 kbits variable-aspect RAM blocks with built-in FIFO control
  • Intelligent low-power operation
  • Secure programming technology that prevents reverse engineering and design theft
  • Available in military temperature grades
DeviceAX250AX500AX1000AX2000
Capacity (in Equivalent System Gates)250,000500,0001,000,0002,000,000
Typical Gates154,000286,000612,0001,060,000
Equivalent Logic Elements1,4082,6886,04810,752
Modules
Register (R-cells)1,4082,6886,04810,752
Combinatorial (C-cells)2,8165,37612,09621,504
Maximum Flip-Flops2,8165,37612,09621,504
Embedded RAM/FIFO
Number of Core RAM Blocks12163664
Total Bits of Core RAM55,29673,728165,888294,912
Clocks (Segmentable)
Hardwired4444
Routed4444
PLLs8888
I/Os
I/O Banks8888
Maximum User I/Os248336516684
Maximum LVDS Channels124168258342
Total I/O Registers7441,0081,5482,052
Speed GradesStd., -1, -2Std., -1, -2Std., -1, -2Std., -1, -2
Temperature GradesC, I, MC, I, MC, I, MC, I, M
Package
PQFP208208  
BGA  7291 
FBGA256, 484484, 6761484, 676, 8961896, 11521
CQFP208, 352208, 3521352256, 352
CCGA/LGA  6241624

C = Commercial, I = Industrial, A = Automotive 

Notes:

  1. Package is discontinued
  2. For part availability please refer to PDN and EOL notifications.

The Axcelerator FPGA family is a single-chip, nonvolatile solution offering high performance and unprecedented design security at densities of up to 2 million equivalent system gates. Utilizing the AX architecture, Axcelerator devices have several system-level features, such as embedded SRAM (with embedded FIFO control logic), PLLs, segmentable clocks, chip-wide highway routing and carry logic. The solution is based on a 0.15-μm, seven-layers-of-metal CMOS antifuse process technology and 350-MHz system performance.

Refer to the image below to find the product that best meets your specifications.

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