The Axcelerator FPGA family is a single-chip, nonvolatile solution offering high performance and unprecedented design security at densities of up to 2 million equivalent system gates. Utilizing the AX architecture, Axcelerator devices have several system-level features, such as embedded SRAM (with embedded FIFO control logic), PLLs, segmentable clocks, chip-wide highway routing and carry logic. The solution is based on a 0.15-μm, seven-layers-of-metal CMOS antifuse process technology and 350-MHz system performance.
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