Event System
The Event System allows peripherals to communicate directly with each other without involving the Central Processing Unit (CPU) or bus resources. The Event System network is independent of the traditional data bus paths. This means that different triggers at the peripheral level can result in an event, such as a timer’s interrupts triggering an action in another peripheral. The Event System has three independent channels for direct peripheral-to-peripheral signaling. This is a deterministic signaling method and a perfect fit for real-time applications. The events are handled at the peripheral level regardless of if the CPU is occupied handling interrupts or in sleep mode.

On-Board Safety and Monitoring
Add robustness and reliability to an application by utilizing built-in features such as the Windowed Watchdog Timer (WDT), the Cyclic Redundancy Check (CRC) feature to scan the Flash memory and fault detection using the Event System, to support safety critical applications. Take advantage of full supply voltage monitoring capabilities with safety features like a Voltage Level Monitor (VLM), a Brown-Out Detector (BOD) and Power-On Reset (POR). All of these features are integrated into each of the ATtiny1607 family members, enabling the design of safer and more robust applications.

Cyclic Redundancy Check (CRC)
The Cyclic Redundancy Check (CRC) is used to verify that there is no corruption in the application code. The CRC scan calculates the checksum of the entire Flash memory, or parts of it, and automatically compares it with the expected result. This enables it to detect errors in program memory fast and efficiently. The CRC can scan at run time, or it can run during reset to ensure that the Flash is valid before the CPU is allowed to execute the code. When the CRC scan is done at run time it temporarily halts the CPU to complete the scan quickly.

Windowed Watchdog Timer (WWDT)
The Windowed Watchdog Timer (WWDT) is a system supervisory circuit that generates a reset if software anomalies, like runaway or deadlocked code, are detected within a configurable critical window. When enabled, the WWDT is a constantly running timer configured to a predefined timeout period. If the WWDT is not reset within the timeout period, it will issue a system reset.

Power-On Reset (POR)
Safe startup of every device is key. During power-up of a device, it is important to give the entire device a reset to put everything in a known state. It is equally important that memories and digital logic have a sufficient supply voltage to operate correctly. When the voltage rises, the POR is activated and will hold the device in reset until the voltage is above a fixed threshold value. The POR will remain enabled as long as the device is powered.

Brown-Out Detect (BOD)
The Brown-Out Detect (BOD) feature monitors the power supply and compares the voltage against a programmable threshold. The BOD is used to ensure erroneous code execution and memory writes do not occur by verifying that the device is operating within specification, which guarantees that the supply voltage is sufficient to run at the selected CPU speed. If the voltage falls below the set threshold, the BOD issues a system reset and will hold the device in reset until the voltage has risen above the set threshold again.

Voltage Level Monitoring (VLM)
The Voltage Level Monitor (VLM) monitors the power supply and can be configured to generate an interrupt request when the voltage passes below a given threshold. This can act as an early warning to the application that the supply voltage is passing the VLM threshold, and the application can take the necessary actions to safely prepare for a possible brown-out situation (power loss). A safe shutdown can benefit from the fast EERPOM page-write and store critical system parameters. The threshold is configured by the user and is expressed in percentage above the configured BOD level.