SAM V Arm^® Cortex^®-M7-Based Microcontrollers (MCUs)

The SAM V70 family's peripheral set includes a High Speed USB device and host controller with integrated transceiver, a Quad SPI (QSPI) interface with Execute-In-Place (XIP) capabilities, a 3-wire MediaLB device interface, a high-speed Multimedia Card (MMC), a synchronous serial controller for TDM/I2S interfaces and a CMOS sensor interface.

Additional peripherals include two CAN FD controllers, an external bus interface with a static memory controller, up to 24-channel 12-bit Analog-to-Digital Converer (ADC), up to 2-channel Digital-to-Analog Converter (DAC), three USARTs configurable as SPI, five UARTs and up to three 2-wire interfaces.

Cryptographic signature and encryption is supported with an NIST-approved True Random Number Generator (TRNG), SHA-256 and AES-256 engines.

The ultra-low-power backup domain meets car makers' key-off requirements, can wake up on a CAN message and retains 1 KB of SRAM critical data.

Key Features

• Arm Cortex-M7 based MCU running up to 300 MHz with 16 KB instruction and 16 KB data cache
• Up to 1 MB embedded Flash and 384 KB multi-port SRAM
• Up to 128 KB instruction TCM and 128 KB data TCM
• QSPI with XIP
• High Speed USB controller with integrated PHY
• 3-wire MediaLB device interface
• CAN FD controllers
• SSC module for TDM/I2S connectivity
• High-speed MMC interface
• CMOS camera interface
• TRNG, SHA-256 and AES-256 cryptographic engines
• 12-bit ADC and DAC
• Low -power backup with 1 KB SRAM with wake-up on CAN < 85 uA at 85°C
• QFP and BGA package options
• SAM V70J: 64 pins
• SAM V70N: 100 pins
• SAM V70Q: 144 pins

The SAM V71 family's peripheral set includes an Ethernet MAC supporting IEEE^® 1588, 802.1Qbb, 802.3az, 802.1AS and 802.1Qav in hardware, a High Speed USB device and host controller with integrated transceiver, a QSPI nterface with XIP capabilities, a 3-wire MediaLB device interface, a high-speed MMC, a synchronous serial controller for TDM/I2S interfaces and CMOS sensor interface.

Additional peripherals include two CAN FD controllers, an external bus interface with a static memory controller, up to 24-channel 12-bit ADC, up to 2-channel DAC, three USARTs configurable as SPI, five UARTs and up to three 2-wire interfaces.

Cryptographic signature and encryption is supported with a NIST-approved TRNG SHA-256 and AES-256 engines.

The ultra-low-power backup domain meets car makers' key-off requirements, can wake up on a CAN message and retains 1 KB of SRAM critical data.

Key Features

• Arm Cortex-M7 based MCU running up to 300 MHz with 16 KB instruction and 16 KB data cache
• Up to 2 MB embedded Flash and 384 KB multi-port SRAM
• Up to 128 KB instruction TCM and 128 KB data TCM
• QSPI with XIP
• High Speed USB controller with integrated PHY
• Ethernet AVB with hardware traffic shaping
• 3-wire MediaLB device interface
• CAN FD controllers
• SSC module for TDM/I²S connectivity
• High-speed MMC interface
• CMOS camera interface
• TRNG, SHA-256 and AES-256 cryptographic engines
• 12-bit ADC and DAC
• Low-power backup with 1 KB SRAM with wake-up on CAN < 85 uA at 85°C
• QFP and BGA package options
• SAM V70J: 64 pins
• SAM V70N: 100 pins
• SAM V70Q: 144 pins