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ZL40208

2:6 LVPECL Buffer with Glitch-free Switching

Status: In Production

Features:

  • Low additive jitter of 121 fs RMS
  • Accepts two differential or single-ended inputs: LVPECL, LVDS, CML, HCSL, LVCMOS
  • Glitch-free switching of references
  • Six precision LVPECL outputs. Operating frequency up to 750 MHz.
  • Options for 2.5 V or 3.3 V power supply with core current consumption of 110 mA
  • On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The ZL40208 is an LVPECL clock fanout buffer with six output clock drivers capable of operating at frequencies up to 750MHz.

The ZL40208 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.

Parametrics
Name
Value
Product Type
Fanout & Buffer and Drivers
Description
2:6 LVPECL buffer
Input
LVPECL/LVDS/CML/HCSL/LVCMOS
Output
LVPECL
Supply Voltage
2.5/3.3
Max Freq (GHz)
0.75
Max Prop Delay (ps)
2000
Icc (mA)
214
Max Within Device Skew (ps)
100
OE
False
RPE
False
FSI
False
Input Mux
True
Input EQ
False
Output Type
LVPECL

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Data Sheets

  
581KB

Application Notes


Development tools data is currently unavailable.

RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Dimension
Solder Composition
JEDEC Indicator
RoHS
China EFUP
ZL40208LDF1
0.070100
0.330000
32
VQFN
5x5x1mm
Matte Tin
e3
ZL40208LDG1
0.070100
0.571429
32
VQFN
5x5x1mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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