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SY58052AU

Status: In Production

Features:

  • Resynchronizes data to a reference clock
  • DC-to >10.7Gbps data rate throughput
  • DC-to >7GHz clock fMAX
  • <160ps Any In-to-Out tpd
  • 30ps typical rise/fall time
  • 0.3psRMS typical random jitter
  • 3psPP typical deterministic jitter (data)
  • <10psPP total jitter (clock)
  • Internal 50Ω input termination
  • Unique input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL)
  • Internal 50Ω output source termination
  • 400mV CML output swing
  • Power supply 2.5V ±5% or 3.3V ±10%
  • -40°C to 85°C temperature range
  • Available in a 3mm x 3mm 16-pin QFN package
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The SY58052AU is an ultra-fast, precision, low jitter data- to-clock resynchronizer with a guaranteed maximum data throughput of 10.7Gbps and a maximum clock of 10.7GHz. The SY58052AU is an ideal solution for backplane retiming or retiming after the data passes through long trace lengths. Serial data comes into the data input, and the CML output is synchronous to the input reference clock’s rising edge.The SY58052AU differential inputs include a unique, internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards, both AC- and DC-coupled, without external resistor-bias and termination networks. The result is a clean, stub-free, low-jitter interface solution. The differential CML output is optimized for 50Ω environments with internal 50Ω source termination and a 400mV output swing.The SY58052AU operates from a 2.5V or 3.3V supply and is guaranteed over the full industrial temperature range (−40°C to +85°C). The SY58052AU is part of a Micrel’s Precision Edge® product family.

Additional Features
    • Resynchronizes data to a reference clock
    • Guaranteed AC performance over temperature and voltage:
      • DC-to >10.7Gbps data rate throughput
      • DC-to >7GHz clock fMAX
      • <160ps Any In-to-Out tpd
      • 30ps typical rise/fall time
    • Ultra low-jitter design:
      • 0.3psRMS typical random jitter
      • 3psPP typical deterministic jitter (data)
      • <10psPP total jitter (clock)
    • Internal 50Ω input termination
    • Unique input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL)
    • Internal 50Ω output source termination
    • 400mV CML output swing
    • Power supply 2.5V ±5% or 3.3V ±10%
    • -40°C to 85°C temperature range
    • Available in a 3mm x 3mm 16-pin QFN package
Parametrics
Name
Value
Product Type
Data and Clock Synchronizer
Input
Any
Supply Voltage
2.5/3.3
Max Freq (GHz)
2.5
Max Data (Gbps)
10.7
Max Prop Delay (ps)
500
Icc (mA)
45
Max Within Device Skew (ps)
20
OE
False
RPE
False
FSI
False
Input Mux
False
Input EQ
False
Output Type
CML
Output Voltage
2.5/3.3V

Documents

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Data Sheets

11/11/2015
739KB

User Guides


Development tools data is currently unavailable.

RoHS Information

Part Number
Device Weight (g)
Shipping Weight (grams)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
SY58052AUMG
0.021300
0.050000
16
VQFN
3x3x1.00mm
NiPdAu
e4
SY58052AUMG-TR
0.021300
0.801700
16
VQFN
3x3x1.00mm
NiPdAu
e4
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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