Many embedded system designs need a method for updating a processor's firmware via standard communication buses. The bootloader for dsPIC33A DSCs uses Microchip Device Firmware Update (MDFU) Protocol, which provides a structured approach for updating the firmware of a client processor using a host processor over various communication interfaces. The figure below illustrates how an MDFU host, which can be either a PC or an embedded processor, transfers a new client application to an MDFU client running on a client processor. The client firmware update code then updates the client application with the new version received from the host.
The MDFU protocol offers several important characteristics for supporting the dsPIC33A Digital Signal Controller (DSC) devices. These characteristics include:
These characteristics make the MDFU protocol a robust and versatile solution for updating the firmware of dsPIC33A DSCs, ensuring compatibility, reliability, and ease of implementation across various embedded system designs.
Demo: dsPIC33A Bootloader and Firmware Upgrade Demo
This example demonstrates dsPIC33A DSC firmware update implemented on the Curiosity Platform Development Board (EV74H48A) with a dsPIC33AK128MC106 DIM (EV02G02A), showcasing the following features:
To access the complete dsPIC33A DSC MDFU based Bootloader library and demo, visit: dsPIC33A Bootloader and Firmware Upgrade Demo
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Microchip Device Firmware Update Protocol Specification | Supporting Collateral | 18 Sep 2024 | Download |
Title | Product |
Title |
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dsPIC33AK64MC102
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK64MC102 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK64MC103
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK64MC103 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK128MC103
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK128MC103 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK128MC105
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK128MC105 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK32MC102
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK32MC102 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK32MC106
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK32MC106 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK32MC105
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK32MC105 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK64MC106
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK64MC106 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK128MC102
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK128MC102 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK32MC103
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK32MC103 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK64MC105
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK64MC105 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |
dsPIC33AK128MC106
200 MHz 32-bit Single-Core Digital Signal Controller (DSC)
|
dsPIC33AK128MC106 | 200 MHz 32-bit Single-Core Digital Signal Controller (DSC) |