The I3C-S core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Slave controller core suitable for any I3C bus topology & compliant with the latest MIPI I3C-BasicSM specification.
Log in to myMicrochip to access tools and benefits. Sign up in just one minute.
Maximize Your Experience: Reap the Personalized Advantages by Completing Your Profile to Its Fullest! Update Here
Stay in the loop with the latest from Microchip! Update your profile while you are at it. Update Here
Complete your profile to access more resources.Update Here!
true
Features and Benefits
- I3C-Basic SDR-Capable and HDR-Tolerant Slave
- Autonomous processing of all Broadcast and Direct Common Command Codes (CCCs) relevant to an I3C-Basic slave.
- Hot-Join Mechanism
- In-Band Interrupts I3C Bus and Device Characteristic Registers (BCR & DCR),
- Dynamic Addressing Assignment
- Optional operation as a legacy I2C device, and interoperable with legacy I2C devices
- Run-time selectable operation modes: Autonomous I3C-to-AHB bridge, or Firmware-assisted, I3C controller
Licensing Options
For additional information, contact info@cast-inc.com or visit CAST
Documentation
|
Title
|
||
|---|---|---|
| i3c-si--mipi-i3c-basic-slave-controller-and-i3c-to-ahb-bridge | Link |