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- Peripheral Pin Select
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8-bit Development Tools
PIC18F K83 Product Family
8-Bit MCUs That Combine CAN and Core Independent Peripherals
The PIC18F K83 family continues our longstanding tradition of innovation in 8-bit MCUs by combining an extensive array of Core Independent Peripherals (CIPs) with the PIC18 CAN product line. These cost-optimized MCUs contain 15 time-saving CIPs in 28-pins with up to 64 KB of flash memory. These products are ideal for applications using CAN in the medical, industrial and automotive markets, such as motorized surgical tables, asset tracking, ultrasound machines, automated conveyors and automotive accessories. System designers can benefit greatly by saving time, as it is significantly easier to configure a hardware-based peripheral, as opposed to writing and validating an entire software routine to accomplish a task. The devices include a full complement of Core Independent Peripherals including Cyclic Redundancy Check (CRC) with memory scan for ensuring the integrity of non-volatile memory; Direct Memory Access (DMA) enabling data transfers between memory and peripherals without CPU involvement; Windowed Watchdog Timer (WWDT) for triggering system resets; 12-bit Analog-to-Digital Converter with Computation (ADC2) for automating analog signal analysis for real-time system response; and Complementary Waveform Generator (CWG) for enabling high-efficiency synchronous switching for motor control.
The products offer intelligent analog peripherals including Zero Cross Detect (ZCD), on-chip comparator, and a 12-bit ADC with Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling, and threshold comparison.
Improved Peripheral Performance
The Direct Memory Access (DMA) Controller eliminates the need for CPU involvement in data transfers between all memory spaces and peripherals, thereby reducing the number of interrupts and improving peripheral performance.
Faster Interrupt Response Times
Vectored Interrupts (VI) reduce response time by introducing an interrupt hierarchy and executing Interrupt Service Routines (ISR) directly. The VI uses Interrupt Vector Tables (IVT) to provide each interrupt source with an interrupt vector. When an interrupt occurs, the ISR is executed immediately, without the need to expend clock cycles scanning the source’s flag bits. This combination of ISR and IVT allow interrupts to be handled entirely through hardware, removing the need to implement a priority system in software and thereby decreasing development time and increasing performance.
Enhanced System Features
The Controller Area Network (CAN) module works with CAN 2.0B and is fully backwards compatible with previous CAN modules. The products include the Memory Access Partition (MAP), which supports customers in data protection and bootloader applications. Device Information Area (DIA) is a dedicated memory space for factory-programmed device ID and peripheral calibration values. Additionally, the MCUs have improved serial communications, including UART with support for Asynchronous, DMX, DALI and LIN protocols along with higher-speed, standalone I2C and SPI serial communication interfaces.
The PIC18F K83 product family is also supported by MPLAB® Code Configurator (MCC), a free software plug-in that provides a graphical interface to configure peripherals and functions specific to your application. MCC is incorporated into our award-winning Integrated Development Environments (IDEs), the downloadable MPLAB X IDE and the cloud-based MPLAB Xpress IDE. Additionally, several Xpress code examples are available to help designers start development immediately.
Building Blocks for Real-Time Control
The Analog to Digital Converter with Computation helps accelerate common math tasks normally done in software by providing post-processing functions like averaging, low-pass filter, oversampling and threshold comparison.
The CRC/SCAN module and the Windowed Watchdog Timer work in tandem to provide engineers with the tools necessary to incorporate functional safety into their application. By ensuring the integrity of the program FLASH contents, PICF19197 devices support the implementation of safety standards such as Class B and UL 1998.
The 10-bit PWM provides edge-aligned output which can be used with the Complementary Waveform Generator.
Complementary Waveform Generator provides a complementary waveform with rising and falling edge dead band control, enabling high-efficiency synchronous switching with no processor overhead. The CWG also incorporates auto shutdown, auto restart and can interface directly with other peripherals/external inputs.
Numerically Controlled Oscillator is a precision linear frequency generator with fine step resolution. It provides high-resolution oscillator capabilities to control applications such as lighting ballast, radio and tone generator.
The Configurable Logic Cell offers hardware-based combinational and sequential logic functions to simplify and accelerate many common tasks. The CLC can also be used as “glue” logic between peripherals, eliminating the need for CPU intervention during steady-state activity in complex control loops.
The Hardware Limit Timer can detect faults in motors, power supplies, and other external devices. It can automatically notify the system to make provisions to shut down and/or safely restart.
The Zero Cross Detect module can monitor AC line voltage and indicate zero crossing activity. This information is made directly available to the on-board Waveform Generation peripherals for use in TRIAC control applications, greatly reducing both CPU demand and overall development cost by lowering the bill of materials.
Peripheral Pin Select provides ultimate flexibility when routing digital signals to device pins. With PPS, any digital peripheral can be connected to any I/O pin on-the-fly for a customized layout. This allows users to maintain layout compatibility with older PIC® MCUs, even as new features are implemented.
Direct Memory Access is used to move data among Flash, EEPROM, RAM and peripherals without intervention from the CPU and in the background of CPU operation.
Memory Access Partition (MAP) supports customers in data protection and bootloader applications. Device Information Area (DIA) is a dedicated memory space for factory programmed device ID and peripheral calibration values.
IDLE and DOZE low-power modes allow applications to optimize device performance and power consumption. The Peripheral Module Disable (PMD) allows unused peripherals to be turned off individually, further reducing power consumption. The device features the industry-leading eXtreme Lower Power (XLP) technology.
PIC18F K83 Key Attributes
- 64MHz Internal Oscillator
- Up to 64 KB Flash Program Memory
- Up to 4 KB Data SRAM & 1KB Data EEPROM
- 12-bit ADC2 (ADC with Computation), 24 channels
- Three 16-bit Timers
- Two Comparators
- Zero Cross Detect (ZCD)
- Windowed Watch Dog Timer (WWDT)
- Cyclic Redundancy Check (CRC) with SCAN
- Vectored Interrupt Capability (VI)
- 10-bit PWMs
- Complementary Waveform Generator (CWG)
- Data Signal Modulator (DSM)
- 5-bit DAC
- UART, SPI, and I2C
- Available in 28-pins