- PIC MCUs
- AVR MCUs
- 8051 MCUs
- 16-bit Pulse Width Modulation
- 24-bit Signal Measurement Timer
- Angular Timer
- Configurable Logic Cell
- Cyclic Redundancy Check
- Complementary Waveform Generator
- Event System
- Hardware Limit Timer
- High Endurance Flash
- Math Accelerator
- Numerically Controlled Oscillator
- Peripheral Pin Select
- Temperature Indicator
- Timer Peripheral
- Windowed Watch Dog Timer
- Pulse-Width Modulation (PWM)
- Pulse Width Modulation Peripheral on PIC and AVR Microcontrollers
- Intelligent Analog
- Core Independent
- Functional Safety
- PIC Hardware
- PIC Software
- AVR Hardware
- AVR Software
8-bit Development Tools
PIC18F K42 Microcontroller Family
High-Performance and Large-Memory 8-Bit MCUs
The PIC18F K42 family of microcontrollers consists of ten highly integrated products — ranging from 16-128 KB of flash memory with package options covering 28-48 pins. This family is equipped with a comprehensive and rich set of Core Independent Peripherals (CIPs) and Intelligent Analog features allowing for many functional tasks to be done in hardware – saving code, validation time, core overhead and power consumption.
These MCUs feature a 12-bit ADC with Computation (ADC2), Direct Memory Access (DMA), Vector Interrupt (VI) Controller and other system enhancements. They are ideal for an extensive range of applications and markets, including automotive, industrial control, Internet of Things (IoT), medical and white goods. The MCUs offer a full suite of Core Independent Peripherals for safety-critical applications (Cyclic Redundancy Check with Memory Scan, Windowed Watchdog Timer, 24-bit Signal Measurement Timer, Hardware Limit Timer, Complementary Waveform Generation), up to eight hardware PWMs and multiple communications interfaces. They include a Configurable Logic Cell which integrates hardware functions to simplify and accelerate many common tasks.
This family of products offer intelligent analog peripherals including Zero Cross Detect (ZCD), on-chip comparator and a 12-bit ADC2, automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and threshold comparison.
Faster Interrupt Response Times
Vectored Interrupts (VI) reduce response time by introducing an interrupt hierarchy and executing Interrupt Service Routines (ISR) directly. The VI uses Interrupt Vector Tables (IVT) to provide each interrupt source with an interrupt vector. When an interrupt occurs, the ISR is executed immediately, without the need to expend clock cycles scanning the source’s flag bits. This combination of ISR and IVT allow interrupts to be handled entirely through hardware, removing the need to implement a priority system in software and thereby decreasing development time and increasing performance.
Improved Peripheral Performance
The Direct Memory Access (DMA) Controller eliminates the need for CPU involvement in data transfers between all memory spaces and peripherals, thereby reducing the number of interrupts and improving peripheral performance.
Enhanced System Features
Memory Access Partition (MAP) supports customers in data protection and bootloader applications. Device Information Area (DIA) is a dedicated memory space for factory programmed device ID and peripheral calibration values. Additionally, the MCUs have improved serial communications, including UART with support for Asynchronous, DMX, DALI and LIN protocols along with higher-speed, standalone I2C and SPI serial communication interfaces.
The PIC18F K42 product family is also supported by MPLAB® Code Configurator (MCC), a free software plug-in that provides a graphical interface to configure peripherals and functions specific to your application. MCC is incorporated into our award-winning Integrated Development Environments (IDEs), the downloadable MPLAB X IDE and the cloud-based MPLAB Xpress IDE. Additionally, several Xpress code examples are available to help designers start development immediately.
Building Blocks for Real-Time Control
The Analog to Digital Converter with Computation helps accelerate common math tasks normally done in software by providing post-processing functions like averaging, low-pass filter, oversampling and threshold comparison.
The Zero Cross Detect module can monitor AC line voltage and indicate zero crossing activity. This information is made directly available to the on-board Waveform Generation peripherals for use in TRIAC control applications, greatly reducing both CPU demand and overall development cost by lowering the bill of materials.
The 10-bit PWM provides edge-aligned output which can be used with the Complementary Waveform Generator.
Complementary Waveform Generator provides a complementary waveform with rising and falling edge dead band control, enabling high-efficiency synchronous switching with no processor overhead. The CWG also incorporates auto shutdown, auto restart and can interface directly with other peripherals/external inputs.
Numerically Controlled Oscillator is a precision linear frequency generator with fine step resolution. It provides high-resolution oscillator capabilities to control applications such as lighting ballast, radio and tone generator.
The Hardware Limit Timer can detect faults in motors, power supplies, and other external devices. It can automatically notify the system to make provisions to shut down and/or safely restart.
The 24-bit Signal Measurement Timer performs high-resolution measurements of any digital signal in hardware, resulting in near zero latency and high performance when decoding custom communications protocols or signaling.
The Configurable Logic Cell offers hardware-based combinational and sequential logic functions to simplify and accelerate many common tasks. The CLC can also be used as “glue” logic between peripherals, eliminating the need for CPU intervention during steady-state activity in complex control loops.
The CRC/SCAN module and the Windowed Watchdog Timer work in tandem to provide engineers with the tools necessary to incorporate functional safety into their application. By ensuring the integrity of the program FLASH contents, PICF19197 devices support the implementation of safety standards such as Class B and UL 1998.
Peripheral Pin Select provides ultimate flexibility when routing digital signals to device pins. With PPS, any digital peripheral can be connected to any I/O pin on-the-fly for a customized layout. This allows users to maintain layout compatibility with older PIC® MCUs, even as new features are implemented.
Memory Access Partition (MAP) supports customers in data protection and bootloader applications. Device Information Area (DIA) is a dedicated memory space for factory programmed device ID and peripheral calibration values.
IDLE and DOZE low-power modes allow applications to optimize device performance and power consumption. The Peripheral Module Disable (PMD) allows unused peripherals to be turned off individually, further reducing power consumption. The device features the industry-leading eXtreme Lower Power (XLP) technology.
PIC18F K42 Key Attributes
- 64MHz Internal Oscillator
- Up to 128KB Flash Program Memory
- Up to 1KB Data EEPROM
- Up to 8K of SRAM
- Vectored Interrupt Capability
- Direct Access Memory (DMA) Controllers
- 12-bit ADC with Computation (ADC2), up to 43 channels
- Memory Access Partition (MAP)
- Device Information Area (DIA)
- Windowed Watch Dog Timer (WWDT)
- Up to three Complementary Waveform Generator (CWG)
- Four Configurable Logic Cell (CLC)
- Peripheral Pin Select (PPS)
- Two Comparators
- Zero Cross Detect (ZCD)
- On-chip Temperature Indicator
- Data Signal Modulator (DSM)
- 5-bit DAC
- Capacitive Voltage Divider (CVD)
- Up to four 10-bit PWMs
- Communication: UART, SPI, and I2C
- Available in 28-, 40- and 48-pins