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SAM S MCUs

Scalable performance, memory density and power efficiency based on ARM®Cortex® M7 Microcontrollers

SAM S series of general-purpose Flash microcontrollers (MCUs) are based on the high-performance 32-bit ARM® Cortex®-M7 RISC processors with floating point unit (FPU). They operate at a maximum speed of 300MHz and feature up to 2048KB of Flash, dual 16KB of cache memory and up to 384KB of SRAM with Tightly Coupled Memory Options. The SAM S series offers an extensive peripheral set, including High Speed USB Host and Device plus phy, up to 8 UARTs, I2S, SD/MMC interface, a CMOS camera interface, system control and analog interfaces.

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Key Features

  • High performance — 1500 CoreMark score on the ARM Cortex-M7 core-based MCU running at 300MHz.
  • Connectivity — CMOS Camera interface, SD/MMC, I2S, High Speed USB device and a full range of serial communication peripherals.
  • Analog — 12-bit ADCs of up to 24 channels with analog front end, offering offset error correction and gain control, as well as hardware averaging up to 16-bit resolution. Also includes 2-channel, 2Msps, 12-bit DAC.
  • Design support — Reduce development time and cost with Atmel Studio integrated development platform, which includes ASF, a complete library of source code, project examples, drivers and stacks.
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SAM S70

SAM S70 series of general purpose Flash microcontrollers (MCUs) is based on the high-performance 32-bit ARM Cortex-M7 RISC processor with dual precision floating point unit (FPU). It operates at a maximum speed of 300MHz and features up to 2048kB of Flash, 2x 16KB of cache memory and up to 384KB of SRAM. A QSPI, static memory and SDRAM interface offer further memory extension options.

The SAM S70 series offers a rich set of peripherals, including high Speed USB Host and Device with on-chip high-speed phy, CMOS Camera Interface, one SD/MMC interface, one SSC supporting TDM and I2S, 8 UARTs, 5 SPI and 3 I2C™.

  • ARM Cortex-M7 core running at 300MHz
  • Floating point unit (FPU) for high-precision computing and accelerated data processing
  • High-performance internal memory architecture with user configurable Tightly Couples Memories and System memory, and 16kB I and D-cache
  • High Speed USB Host and Device with on-chip high-speed Phy
  • CMOS image sensor interface
  • AES hardware encryption engines, TRNG and SHA-based memory integrity checker
  • Advanced analog front end based on dual 2Msps 12-bit ADCs, including 16-bit average, up to 24 channels, offset error correction and gain control
  • Dual 2Msps, 12-bit DAC and analog comparator
  • 64 to 144-pin package options
  • Extended industrial temperature range: -40°C to 105°C