Intelligent Lighting and Control
Intelligent Lighting and Control
- Design Partners
- LED Drivers for Human Centric Lighting
- Lighting Communications Development Platform
- PIC16F1947 Lighting Control Console
- PIC16F1788 Wireless DC/DC LED Driver (Proof of Concept)
- PIC16F1509 Solar Powered LED Security Lamp (Proof of Concept)
- PIC12F752 AC/DC LED Driver (Proof of Concept)
- PIC16F1508 DALI Dimmable Fluorescent Ballast (Proof of Concept)
PIC12F752 AC/DC LED Driver (Proof of Concept)
- AC/DC Flyback Power Supply~85% Efficiency
- 90 VAC – 240 VAC Input
- Single hardware platform
- Firmware based configuration
- 20 VDC / 375mA Output
Theory of Operation
This proof of concept design is a critical conduction, peak current mode flyback power supply with PFC.
- The system begins to run as soon as the bootstrap voltage rises above 5V turning ON the MCP1416 FET driver.
- When the voltage is high enough the PIC12F752 initializes the HLT, COG, DAC and comparators as shown in the system diagram.
- The Hardware Limit Timer (HLT) emits a pulse train at 50 kHz setting the output of the COG high. This pulse train is interruptible by the reset input. The HLT starts the power supply in the absence of a zero current pulse from the comparator. Reference the PIC12F752 datasheet for more details.
- The HLT sets the COG which drives the transistor ON allowing current to flow from the supply through the primary side of the inductor. In the case of a leading edge (TRIAC) dimmer this current may simply be biasing the TRIAC but not enough current to trip the peak current comparator.
- Eventually the current rises to the comparator trip point set by the resistive DAC. In the case of a TRIAC dimmer, the TRIAC finally conducts and the current rises quickly. The resistive DAC is attached to the supply voltage so that the DAC set point (peak current set point) follows the supply voltage forcing the peak current to be synchronized and proportional to the voltage – this is the active PFC function.
- When the peak current is reached the COG is turned OFF. The COG has a pair of comparator blanking timers that count off a few clock cycles to prevent switching noise from causing a false trigger.
- When the primary is turned OFF the voltage in the secondary and the bias rise until the primary current is able to be transferred into the secondary.
- The peak voltage on the bias is generally proportional to the peak voltage on the secondary. The diode/capacitor circuit captures and filters this peak voltage and presents it to the ADC so the firmware can regulate the output voltage.
- As the current in the primary falls the voltage at the bias will drop until a zero volt crossing occurs at zero current. The zero volt crossing triggers the next rising edge on the COG, resets the HLT and the process repeats at step 4.
Reducing the voltage at the supply will reduce the peak current set point at the ADC and reduce the power delivered unless the DAC is adjusted to compensate. Phase cutting the supply voltage will also reduce the power delivered unless the DAC is adjusted to compensate.
- The simplest regulation for this design is simply to use feed forward to set the DAC at a level appropriate for the average line voltage. If the DAC value is fixed at a suitable level then dimming is "free" and requires no firmware.
- If the line regulation is sloppy and feedback is required a simple PI control can be implemented to adjust the DAC to maintain a voltage on the secondary. DAC adjustments required every few zero crossings so the computational performance is not a limiting factor.
- Phase Cut or supply voltage adjustments need to be factored into the regulation as a feed forward term. This will allow the regulation set point to be adjusted to account for specific dimming behavior.
- When dimming below 10% a cycle skipping algorithm may be required to minimize flicker while transferring the very low power levels into the LED's.
- PFC is affected by the EMI filter. Be careful in the EMI filter design so that the filter does not cause an undesirable phase shift in the voltage applied to the DAC.
- The bootstrap supply and the snubber can be more efficient if they are optimized for the supply voltage in a given region. The TVS snubber causes audible noise in the transformer so that may be undesirable in some applications.
- The ADC can also be used to measure the voltage applied to the top of the DAC. This is used to determine the phase cut angle, zero crossing, and peak voltage for feed forward
Contact your local sales representative to see a working demonstration of the AC/DC LED Driver.
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