DDR termination regulators are necessary to save power while DDR memory is active. Today, DDR is becoming even faster and more effective in transferring data and this makes the systems powering the DDR memory more susceptible to frequent and inaccurate data transfer. A good DDR termination regulator closely tracks supplied voltage and quickly sinks or sources current to maintain a regulated transmission of power. This ultimately leads to a more efficient double-data-rate memory and an indispensable power solution for a variety of mobile and home devices.
We manufacture a focused and effective line of DDR termination regulators that feature low output impedance, very high bandwidth, quick transient response time and high output voltage accuracy. Our DDR termination solutions are ideal choices for achieving accurate and high-speed bus termination.
The MIC5162 is a dual regulator controller designed for high-speed bus termination. It provides a universal solution for bus termination regardless of input voltage, output voltage or load current.
The MIC5163 is a dual regulator controller designed for low-voltage memory termination. The MIC5163 can operate from an input voltage as low as 0.75V.
The MIC5164 is a dual regulator controller designed for high-speed bus termination. It offers a low-cost JEDEC-compliant solution for terminating high-speed, low-voltage digital buses with a Power Good (PG) signal.
The MIC5165 is a JEDEC-compliant solution for terminating high-speed, low-voltage digital buses with a Power Good signal.
The MIC5166 is a high-speed, linear, low Vin DDR memory terminator that can source and sink up to 3A.
The MIC5167 is a highly efficient synchronous buck regulator designed for use as a DDR or QDDR terminator. The MIC5167 is optimized to achieve more than 94% efficiency while switching at 1MHz over a broad range.
Uses a SIMetrix/SIMPLIS environment to model circuit behavior, reducing design time with software debugging for initial design verification.