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Clock and Data Distribution

We offer one of the most extensive arrays of clock distribution product lines in the industry including drivers and receivers, dividers, logic translators, multiplexers, crosspoint switches, backplane and cable buffers and equalizers, delay lines for skew management, and flip-flops and logic gates. These devices support differential (LVPECL, LVDS, HCSL, CML) and single-ended CMOS outputs, and offer a maximum clock rate of 7.0 GHz and data rate of 10.7 Gbps. These products can be designed into a wide variety of applications including high-speed networking, communications, industrial, medical and military systems.

Crosspoint Switches

  • Single- and dual-channel
  • Up to 6 GHz clock rate and 10.7 Gbps data rate
  • CML/LVDS

Drivers and Receivers

  • PECL/LVPECL/CML/LVDS
  • Up to 7.0 GHz clock rate and 10.7 Gbps data rate


Dividers

  • Divide by 1, 2, 3, 4, 5, 8, 16
  • Multiple output banks
  • Single-ended and differential
  • PECL/LVPECL/CML/LVDS

Flip-Flops and Logic Gates

  • D flip-flops: CML output
  • Logic gates

Backplane and Cable

  • Pre-emphasis and equalization
  • Single-ended and differential
  • Up to 6.4 Gbps CML output

Multiplexers

  • Maximum of up to 16 inputs
  • PECL/LVPECL/CML/LVDS
  • Up to 7.0 GHz clock rate and 10.7 Gbps data rate

Logic Translators

  • Clock or data rates up to 7 GHz
  • Conversion from single-ended to differential


Skew Management

  • 2.2–13.2 ns programmable delay
  • 10 ps delay increments
  • Fine tune control
  • Chip cascading: extend delay