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Clock and Data Distribution
Microchip offers one of the most extensive arrays of clock distribution product lines in the industry. Ranging from 2 to 22 outputs, they support differential (LVPECL, LVDS, HCSL, CML) and single-ended CMOS outputs, and have a maximum clock rate of 7.0 GHz and data rate of 10.7 Gbps, with very low additive jitter. Microchip’s clock distribution family consist of TCXO fanout buffers, crystal or reference input fanout buffers, signal translators, cross-point switches, high-performance clock dividers, receiver-buffer drivers, multiplexers, delay lines and logic gates.
- 2 - 22 outputs offered
- PECL/LVDS/HCSL/CMOS
- Up to 7.0 GHz clock rate & 10.7 Gbps data rate
- PECL/LVPECL/CML/LVDS
- Up to 7.0 GHz clock rate & 10.7 Gbps data rate
- High perf. low skew, low jitter
- Distributes high speed and spread spectrum clocks
- Gen 1, 2, 3 compliant
- 2 - 19 outputs
- Divide by 1, 2, 3, 4, 5, 8, 16
- Multiple Output Banks
- Single-Ended & Differential
- PECL/LVPECL/CML/LVDS
- Clock or data rates up to 7 GHz
- Conversion from single-ended to diff.
- Up to 16 input Max
- PECL/LVPECL/CML/LVDS
- Up to 7.0 GHz clock rate & 10.7 Gbps data rate
- Single & Dual Channel
- Up to 6 GHz clock rate & 10.7 Gbps data rate
- CML/LVDS
- Pre-Emphasis and Equalization
- Single-Ended & Differential
- Up to 6.4Gbps CML Output
- 2.2 - 13.2ns Programmable delay
- 10ps delay increments
- Fine Tune Control
- Chip Cascading: extend delay
- D flip-flops: CML Output
- Logic Gates
Additional Clock and Timing Technologies Acquired from Microsemi
With the acquisition of Microsemi, we now have a more comprehensive portfolio of timing technologies, services and solutions, enabling you to build more reliable networks and systems supporting today’s precise timing standards. The technologies we’ve acquired include synchronization systems and services, clock management, precision crystal and SAW oscillators, embedded atomic clocks, GPS disciplined oscillators and network synchronization ICs.