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SY10E112

Status: Not Recommended for new designs

Features:

  • 600psmax propagation delay
  • Extended 100E VEE range of -4.2V to -5.5V
  • Common enable input
  • Fully compatible with industry standard 10KH, 100K I/O levels
  • Internal 75KΩ input pulldown resistors
  • Fully compatible with Motorola MC10E/100E112
  • Available in 28-pin PLCC package
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Device Overview

Summary

The SY10/100E112 are quad drivers designed for use in new, high-performance ECL systems. The E112 has two pairs of OR/NOR outputs from each gate and a common, buffered enable input. The data input can also be used as an ECL memory address fan-out driver, although the E111 is designed specifically for this purpose, and offers lower skew than the E112. For memory address driver applications where scan capabilities are required, please refer to the SY10/100E212 device.

Additional Features
    • 600psmax propagation delay
    • Extended 100E VEE range of -4.2V to -5.5V
    • Common enable input
    • Fully compatible with industry standard 10KH, 100K I/O levels
    • Internal 75KΩ input pulldown resistors
    • Fully compatible with Motorola MC10E/100E112
    • Available in 28-pin PLCC package
Parametrics
Name
Value
Product Type
Fanout & Buffer and Drivers
Input
LVPECL/LVDS
Supply Voltage
5V
Max Freq (GHz)
1
Icc (mA)
100
OE
True
RPE
False
FSI
False
Input Mux
True
Input EQ
False
Output Type
LVPECL
Output Voltage
2.5/3.3V

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