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Embedded Controller

MEC1521

Embedded Controller

Status: In Production

Overview
Documents
Development Environment
Similar Devices
RoHS Information
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Device Overview

Summary

The MEC152x is a family of low power integrated embedded controllers designed for notebook applications. The MEC152x is a highly-configurable, mixed-signal, advanced I/O controller architecture. It contains a 32-bit ARM® CortexM4 processor core with closely-coupled memory for optimal code execution and data access. An internal ROM, embedded in the design, is used to store the power on/boot sequence and APIs available during run time. When VTR_CORE is applied to the device, the secure boot loader API is used to download the custom firmware image from the system’s shared SPI Flash device, thereby allowing system designers to customize the device’s behavior.

The MEC152x device is directly powered by a minimum of two separate suspend supply planes (VBAT and VTR) and senses a third runtime power plane (VCC) to provide “instant on” and system power management functions. The MEC152x has two banks of I/O pins that are able to operate at either 3.3 V or 1.8 V. Operating at 1.8V allows the MEC152x to interface with the latest platform controller hubs and will lower the overall power consumed by the device, whereas 3.3V allows this device to be integrated into legacy platforms that require 3.3V operation.

The MEC152x host interface is the Intel® Enhanced Serial Peripheral Interface (eSPI). The eSPI Interface is a 1.8V interface that operates in single, double and quad I/O modes. The eSPI Interface supports all four eSPI channels: Peripheral Channel, Virtual Wires Channel, OOB Message Channel, and Run-time Flash Access Channel. The eSPI hardware Flash Access Channel is used by the Boot ROM to support Master Attached Flash Sharing (MAFS). In addition, the MEC152x has specially designed hardware to support Slave Attached Flash Sharing (SAFS). The eSPI SAFS Bridge imposes Region-Based Protection and Locking security feature, which limits access to certain regions of the flash to specific masters. There may be one or more masters (e.g., BIOS, ME, etc) that will access the SAF via the eSPI interface. The ARM® Cortex-M4 processor is also considered a master, which will also have its access limited to EC only regions of SPI Flash as determined by the customer firmware application.

The MEC152x secure boot loader authenticates and optionally decrypts the SPI Flash OEM boot image using the AES256, ECDSA , SHA-384 cryptographic hardware accelerators. The MEC152x hardware accelerators support 128-bit and 256-bit AES encryption, ECDSA and EC_KCDSA signing algorithms, 1024-bits to 4096-bits RSA and Elliptic asymmetric public key algorithms, and a True Random Number Generator (TRNG). Runtime APIs are provided in the ROM for customer application code to use the cryptographic hardware. Additionally, the device offers lockable OTP storage for private keys and IDs.
The MEC152x is designed to be incorporated into low power PC architecture designs and supports ACPI sleep states (S0-S5). During normal operation, the hardware always operates in the lowest power state for a given configuration. The chip power management logic offers two low power states: light sleep and heavy sleep. These features can be used to support S0 Connected Standby state and the lower ACPI S3-S5 system sleep states. In connected standby, any eSPI command will wake the device and be processed. When the chip is sleeping, it has many wake events that can be configured to return the device to normal operation. Some examples of supported wake events are PS2 wake events, RTC, Week Alarm, Hibernation Timer, or any GPIO pin. 

The MEC152x offers a software development system interface that includes a Trace FIFO Debug port, a host accessible serial debug port with a 16C550A register interface, a Port 80 BIOS Debug Port, and a 2-pin Serial Wire Debug (SWD) interface. Also included is a 4-wire JTAG interface used for Boundary Scan testing.

Parametrics
Name
Value
Keyboard Scan Matrix
18x8
Customer Programmable RAM
Yes
Host Interface
eSPI, LPC, I2C
Crypto Engine
Yes
Code Storage
480 KB (Code + Data)
Operating Temperature
0C to +70C
Deep Sleep S5
Yes
Fan Tachometer Inputs
2
Max Operating Frequency
48 MHz
8024 Keyboard Controller
Yes
Data RAM
32 KB
Breathing/ Blinking LED
4
GPIO
148
Package
144-WFBGA (SZ)
LED
4
Analog to Digital Converter
8
BC Link
2
AMD SB-TSI
1
ACPI Interfaces
5

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Dimension
Solder Composition
JEDEC Indicator
RoHS
China EFUP
MEC1521H-B0-I/SZ
0.128300
0.826923
144
WFBGA
9x9x0.8mm
SAC
e8
MEC1521H-B0-I/TF
0.083600
0.580769
128
WFBGA
7x7x0.8mm
SAC105
e8
MEC1521H-B0-I/SZ-TR
0.128300
0.273333
144
WFBGA
9x9x0.8mm
SAC
e8
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Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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