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KSZ8565

5-Port 10/100 AVB Ethernet Switch

Status: In Production

Features:

  • Non-blocking wire-speed Ethernet switching fabric
  • IEEE802.1AS (AVB) time synchronization support
  • IEEE802.1Qav (AVB) credit based traffic shaper
  • Time aware traffic scheduler with low latency cut-through mode
  • IEEE1588v2 Precision Time Protocol support
  • Time-stamping on all ports
  • Precision GPIO pin timed to the AVB/1588 clock 
  • Full-featured forwarding and filtering control, including Access Control List (ACL) filtering
  • IEEE802.1X support (Port-Based Network Access Control)
  • IEEE802.1Q VLAN supportfor 128 active VLAN groups and the full range of 4096 VLAN IDs
  • IEEE802.1p/Q tag insertion or removal on a per port basis and support for double-tagging
  • VLAN ID tag/untag options on per port basis
  • IEEE802.3x full-duplex flow control and half-duplex back pressure collision control
  • IGMPv1/v2/v3 snooping for multicast packet filtering
  • IPv6 multicast listener discovery (MLD) snooping
  • QoS/CoS packets prioritization support: 802.1p, DiffServ-based and re-mapping of 802.1p priority field per-port basis on four priority levels
  • IPv4/IPv6 QoS support
  • Programmable rate limiting at ingress and egress ports
  • Broadcast storm protection
  • Four priority queues with dynamic packet mapping for IEEE802.1p, IPv4 DIFFSERV, IPv6 TrafficClass
  • MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets
  • Self-address filtering for implementing ring topologies 
  • High-speed SPI (4-wire, up to 50MHz) interface to access all internal registers
  • I2C Interface to access all registers
  • MII management (MIIM, MDC/MDIO 2 wire) interface to access all PHY registers per IEEE 802.3 specification
  • In-band management to access all registers via any of the five ports, strap enabled
  • I/O pin strapping facility to set certain register bits from I/O pins at reset time 
  • Control registers configurable on-the-fly
  • Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port or MII/RMII
  • MIB counters for fully-compliant statistics gathering (34 MIB counters per port)
  • Full-chip software power-down
  • Energy detect power-down (EDPD)
  • Support IEEE P802.3az Energy Efficient Ethernet (EEE)
  • Wake on LAN (WoL) support
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Overview
Documents
Development Environment
Similar Devices
RoHS Information
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Device Overview

Summary

The KSZ8565 is a managed, five-port 10/100 Ethernet switch with numerous advanced features designed to exceed Automotive AEC-Q100 Grade 2 (-40°C to +105°C) and EMC requirements. Four of the five ports incorporate 10/100 Mbps PHYs. The other port has a 1000 Mbps MAC interface that can be configured as RGMII, MII or RMII. It can connect directly to a host processor or to an external PHY.  

Full register access is available by SPI or I2C interfaces, and by optional in-band management via any of the data ports. PHY register access is provided by a MIIM interface.

Security features include support for IEEE 802.1X port-based authentication and Access Control List (ACL) filtering.

As a member of the EtherSynch® product family, the KSZ8565 incorporates full hardware support for the IEEE 1588v2 Precision Time Protocol (PTP), including hardware time-stamping at all PHY-MAC interfaces, and a high-resolution hardware “PTP clock”. IEEE 1588 provides sub-microsecond synchronization for a range of industrial Ethernet applications.

The KSZ8565 fully supports the IEEE family of audio video bridging (AVB) standards, which provide for high quality of service (QoS) for latency sensitive traffic streams over Ethernet. Time-stamping and time-keeping features support IEEE 802.1AS time synchronization. All ports feature credit based traffic shapers for IEEE 802.1Qav, and a time aware scheduler as proposed for IEEE 802.1Qbv. 

An assortment of power-management features including Energy-Efficient Ethernet (EEE) have been designed in to satisfy energy efficient environments.

Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.

Additional Features
      Integrated 5-port 10/100 Layer-2 switch with 1000 Mbps MAC and RGMII interface
      • Non-blocking wire-speed Ethernet switching fabric

      Advanced Switch Capabilities
      • IEEE802.1AS (AVB) time synchronization support

      • IEEE802.1Qav (AVB) credit based traffic shaper

      • Time aware traffic scheduler with low latency cut-through mode

      • IEEE1588v2 Precision Time Protocol support

      • Time-stamping on all ports

      • Precision GPIO pin timed to the AVB/1588 clock 

      • Full-featured forwarding and filtering control, including Access Control List (ACL) filtering

      • IEEE802.1X support (Port-Based Network Access Control)

      • IEEE802.1Q VLAN supportfor 128 active VLAN groups and the full range of 4096 VLAN IDs

      • IEEE802.1p/Q tag insertion or removal on a per port basis and support for double-tagging

      • VLAN ID tag/untag options on per port basis

      • IEEE802.3x full-duplex flow control and half-duplex back pressure collision control

      • IGMPv1/v2/v3 snooping for multicast packet filtering

      • IPv6 multicast listener discovery (MLD) snooping

      • QoS/CoS packets prioritization support: 802.1p, DiffServ-based and re-mapping of 802.1p priority field per-port basis on four priority levels

      • IPv4/IPv6 QoS support

      • Programmable rate limiting at ingress and egress ports

      • Broadcast storm protection

      • Four priority queues with dynamic packet mapping for IEEE802.1p, IPv4 DIFFSERV, IPv6 TrafficClass

      • MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets

      • Self-address filtering for implementing ring topologies 

      Comprehensive Configuration Register Access
      • High-speed SPI (4-wire, up to 50MHz) interface to access all internal registers
      • I2C Interface to access all registers

      • MII management (MIIM, MDC/MDIO 2 wire) interface to access all PHY registers per IEEE 802.3 specification

      • In-band management to access all registers via any of the five ports, strap enabled

      • I/O pin strapping facility to set certain register bits from I/O pins at reset time 

      • Control registers configurable on-the-fly
      Switch Monitoring Features
      • Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port or MII/RMII
      • MIB counters for fully-compliant statistics gathering (34 MIB counters per port)
      Low Power Dissipation
      • Full-chip software power-down
      • Energy detect power-down (EDPD)
      • Support IEEE P802.3az Energy Efficient Ethernet (EEE)
      • Wake on LAN (WoL) support
Parametrics
Name
Value
Description
5-Port 10/100 Ethernet Switch with AVB, RGMII
Ethernet Bandwidth
10/100Mbps
MAC
5
PHY
4
TX/RX RAM Buffer(Bytes)
n/a
Interrupt Pin
Yes
LEDs
8
Op. Voltage (V)
3.3
Interface
MII/RMII/RGMII
I/O Pins
1
IEEE 1588
Yes
Temp. Range Min. (°C)
-40
Temp. Range Max. (°C)
105
# of Ports
5
Automotive
Yes
Managed
Yes
Copper Support
10/100 (4)
MII
Yes
RMII
Yes
RGMII
Yes
Supply Voltage (V)
3.3
Vdd I/O (V)
1.8/2.5/3.3
LinkMD Cable Diag
Yes
On-Chip Termination
Yes
Smart Power Adjust
Yes
Largest Pkt-Size Bytes
9000
IPV6
Yes
# of VLAN
128
Flow Ctrl
Yes
Rate Limiting
Yes
Rapid Spanning Tree
Yes
Static MAC Addr
Yes

Documents

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Data Sheets

Board Design Files

Development Environment

  • Demo & Evaluation Boards
Demo & Evaluation Boards
KSZ9477 Managed Switch Evaluation Board with SAMA5D36 MPU
KSZ9477 Managed Switch Evaluation Board with SAMA5D36 MPU ( EVB-KSZ9477-1 )

This is the evaluation board for the KSZ9477S 7-Port Gigabit Ethernet Switch (also KSZ9567 and KSZ8567). The SAMA5D3 processor manages the switch and includes the ATECC508A security encoder. The DSC1101 is the reference clock for GigE communication. The EVB can be used to implement IEEE 1588v2, AVB and DLR/HSR (available on KSZ9477 only) network redundancy. Combine multiple boards to implement

...

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (grams)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
KSZ8565RTXV-TRVAO
0.557500
1.010000
128
TQFP
14x14x1mm
Matte Tin
e3
KSZ8565RTXV-VAO
0.557500
1.888889
128
TQFP
14x14x1mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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