Configuration Registers of LAN743x Application Note
The LAN743x can be configured:
Via One-Time Programmable (OTP) Memory
Via External EEPROM
OTP Memory: The LAN743x device's registers may be configured via the hub’s internal OTP memory. Any register may be given a new default value. It has a capacity of 1 kB arranged as 1K x 8 bits. The OTP supports single bits write and 8-bit reads and each byte within the OTP memory may be written only once. The OTP memory may be programmed via the PCIe interface.
External EEPROM: The device may use an external EEPROM to store the default values for the PCIe controller and the MAC address. The EEPROM controller supports most “93C56 or 93C66” type 256/512 byte EEPROMs. A total of nine address bits are used. A Microwire style 2K/4K EEPROM that is organized for 256/512 x 8-bit operation must be used. After a system-level reset occurs, the device loads the default values from EEPROM. The device is connected to the PCIe bus but responds with CRS until this process is completed. The EEPROM controller also allows the Host to read, write and erase the contents of the Serial EEPROM.
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