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CoreFPU


The Core Floating Point Unit (CoreFPU) is designed for floating-point arithmetic and conversion operations for single precision floating point numbers. CoreFPU supports fixed-point to floating-point and floating-point to fixed-point conversions and floating-point addition, subtraction, and multiplication operations. The IEEE® Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point computation.


Features and Benefits


  • Supports single and double precision floating numbers as per IEEE-754 Standard. 
  • Supports conversions as listed:
    • Fixed-point to Floating point conversion
    • Floating point to Fixed point conversion 
  • Supports Arithematic operations as listed:
    • Floating-point addition 
    • Floating-point subtraction 
    • Floating-point multiplication 
  • Provides rounding scheme ( round to nearest even) for the arithemtic operations only.
  • Provides Flags for Overflow, Underflow, Infinity (Positive Infinity, Negative Infinity), Quiet NaN (QNaN) and Signalling NaN (SNaN) for Floating-Point Numbers.
  • Supports Fully pipelined implementation of Arithmetic Operations.
  •  Provides Provision to configure the Core for Design Requirements. 

Licensing Options


Free with any Libero License

Documentation


Title
CoreFPU User Guide Download