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ATSAMS70Q21

Status: In Production

Features:

  • ARM Cortex-M7 running at up to 300 MHz(1)
  • 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
  • Simple- and double-precision HW Floating Point Unit (FPU)
  • Memory Protection Unit (MPU) with 16 zones
  • DSP Instructions, Thumb®-2 Instruction Set
  • Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
  • Up to 2048 Kbytes embedded Flash with unique identifier and user signature for user-defined data
  • Up to 384 Kbytes embedded Multi-port SRAM
  • Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x 128 Kbytes)
  • 16 Kbytes ROM with embedded Boot Loader routines (UART0, USB) and IAP routines
  • 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and NAND Flash with on-the-fly scrambling
  • 16-bit SDRAM Controller (SDRAMC) interfacing up to 256 MB and with on-the-fly scrambling
  • Embedded voltage regulator for single-supply operation
  • Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
  • Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
  • RTC with Gregorian calendar mode, waveform generation in low-power modes
  • RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations
  • 32-bit low-power Real-time Timer (RTT)
  • High-precision 4/8/12 MHz internal RC oscillator with 4 MHz default frequency for device startup. In-application trimming access for frequency adjustment. 8/12 MHz are factory-trimmed.
  • 32.768 kHz crystal oscillator or embedded 32 kHz (typical) RC oscillator as source of low-power mode device clock (SLCK)
  • One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
  • Temperature Sensor
  • One dual-port 24-channel central DMA Controller (XDMAC)
  • Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 µA in Backup mode with RTC, RTT and wake-up logic enabled
  • Ultra-low-power RTC and RTT
  • 1 Kbyte of backup RAM (BRAM) with dedicated regulator
  • USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-Kbyte FIFO, up to 10 bidirectional endpoints, dedicated DMA
  • 12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
  • Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modem modes; USART1 supports LON mode.
  • Five 2-wire UARTs with SleepWalking support
  • Three Two-Wire Interfaces (TWIHS) (I2 C-compatible) with SleepWalking support
  • Quad I/O Serial Peripheral Interface (QSPI) interfacing up to 256 MB Flash and with eXecute-In-Place and onthe-fly scrambling
  • Two Serial Peripheral Interfaces (SPI)
  • One Serial Synchronous Controller (SSC) with I2S and TDM support
  • Two Inter-IC Sound Controllers (I2SC)
  • One High-speed Multimedia Card Interface (HSMCI) (SDIO/SD Card/e.MMC)
  • Four Three-Channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes, constant on time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
  • Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWM for motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control.
  • Two Analog Front-End Controllers (AFEC), each supporting up to 12 channels with differential input mode and programmable gain stage, allowing dual sample-and-hold at up to 2 Msps. Gain and offset error autotest feature.
  • One 2-channel 12-bit 1Msps-per-channel Digital-to-Analog Controller (DAC) with differential and oversampling modes
  • One Analog Comparator (ACC) with flexible input selection, selectable input hysteresis
  • True Random Number Generator (TRNG)
  • AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications ̶ Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
  • Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination
  • Five Parallel Input/Output Controllers (PIO)
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Overview
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Development Environment
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Device Overview

Summary

The Microchip SAMS70Q21 devices are members of a flash microcontrollers family based on the high-performance 32-bit ARM Cortex-M7 processor with Floating Point Unit (FPU). These devices operate at up to 300MHz and feature up to 2048 Kbytes of Flash, up to 384 Kbytes of multi-port SRAM and configurable Instruction and Data Tightly Couple Memories to leverage the advanced DSP capabilities of the core. SAMS70Q21 features multiple communication interfaces including a HS USB Host and Device, a HS SDCard/SDIO/MMC interface, USARTs, SPIs and multiple TWIs. Analog features include dual 2Msps 12-bit ADCs with analog front end offering offset and gain error correction, and 2Msps 12-bit DAC.

The SAMS70Q21 is available in 144-pin QFP and BGA package options.

Note: While there are no plans to change the availability status of Revision A for this device, new designs should use Revision B for prototypes and production.
 

Additional Features
      • Core
        • ARM Cortex-M7 running at up to 300 MHz(1)
        • 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
        • Simple- and double-precision HW Floating Point Unit (FPU)
        • Memory Protection Unit (MPU) with 16 zones
        • DSP Instructions, Thumb®-2 Instruction Set
        • Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
      • Memories
        • Up to 2048 Kbytes embedded Flash with unique identifier and user signature for user-defined data
        • Up to 384 Kbytes embedded Multi-port SRAM
        • Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x 128 Kbytes)
        • 16 Kbytes ROM with embedded Boot Loader routines (UART0, USB) and IAP routines
        • 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and NAND Flash with on-the-fly scrambling
        • 16-bit SDRAM Controller (SDRAMC) interfacing up to 256 MB and with on-the-fly scrambling
      • System
        • Embedded voltage regulator for single-supply operation
        • Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
        • Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
        • RTC with Gregorian calendar mode, waveform generation in low-power modes
        • RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations
        • 32-bit low-power Real-time Timer (RTT)
        • High-precision 4/8/12 MHz internal RC oscillator with 4 MHz default frequency for device startup. In-application trimming access for frequency adjustment. 8/12 MHz are factory-trimmed.
        • 32.768 kHz crystal oscillator or embedded 32 kHz (typical) RC oscillator as source of low-power mode device clock (SLCK)
        • One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
        • Temperature Sensor
        • One dual-port 24-channel central DMA Controller (XDMAC)
      • Low-Power Features
        • Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 µA in Backup mode with RTC, RTT and wake-up logic enabled
        • Ultra-low-power RTC and RTT
        • 1 Kbyte of backup RAM (BRAM) with dedicated regulator
      • Peripherals
        • USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-Kbyte FIFO, up to 10 bidirectional endpoints, dedicated DMA
        • 12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
        • Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modem modes; USART1 supports LON mode.
        • Five 2-wire UARTs with SleepWalking support
        • Three Two-Wire Interfaces (TWIHS) (I2 C-compatible) with SleepWalking support
        • Quad I/O Serial Peripheral Interface (QSPI) interfacing up to 256 MB Flash and with eXecute-In-Place and onthe-fly scrambling
        • Two Serial Peripheral Interfaces (SPI)
        • One Serial Synchronous Controller (SSC) with I2S and TDM support
        • Two Inter-IC Sound Controllers (I2SC)
        • One High-speed Multimedia Card Interface (HSMCI) (SDIO/SD Card/e.MMC)
        • Four Three-Channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes, constant on time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
        • Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWM for motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control.
        • Two Analog Front-End Controllers (AFEC), each supporting up to 12 channels with differential input mode and programmable gain stage, allowing dual sample-and-hold at up to 2 Msps. Gain and offset error autotest feature.
        • One 2-channel 12-bit 1Msps-per-channel Digital-to-Analog Controller (DAC) with differential and oversampling modes
        • One Analog Comparator (ACC) with flexible input selection, selectable input hysteresis
      • Cryptography
        • True Random Number Generator (TRNG)
        • AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications ̶ Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
      • I/O
        • Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination
        • Five Parallel Input/Output Controllers (PIO)
Parametrics
Name
Value
Part Family
SAM S70
Max CPU Speed MHz
300
Program Memory Size (KB)
2048
SRAM (KB)
384
DRAM Interface
sdram
Auxiliary Flash (KB)
0.512
SDIO/SD-CARD/eMMC
1
Crypto Engine
Yes
Temperature Range (C)
-40 to 105
Operating Voltage Range (V)
1.62 to 3.6
Direct Memory Access Channels
24
SPI
5
I2C
3
Peripheral Pin Select / Pin Muxing
Yes
Number of USB Modules
1
USB Interface
High Speed
ADC Input
24
Max ADC Resolution (Bits)
12
Max ADC Sampling Rate (ksps)
2000
Number of DACs
1
Input Capture
24
Standalone Output Compare/Standard PWM
24
Motor Control PWM Channels
16
Max 16-bit Digital Timers
12
Parallel Port
EBI
Number of Comparators
1
Internal Oscillator
4,8,12Mhz, 32Khz
Hardware RTCC/RTC
Yes
Max I/O Pins
114
Pincount
144
Quadrature Encoder Interface
4

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04/04/2018
2203KB

Development Environment

  • Demo & Evaluation Boards
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Demo & Evaluation Boards
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The SAM V71 Xplained Ultra evaluation kit is ideal for evaluating and prototyping with the SAM V71, SAM V70, SAM S70 and SAM E70 ARM® Cortex®-M7 based microcontrollers. Xplained Pro Extension kits compatible with SAM V71 Xplained Ultra can be purchased individually.

The ATSAMV71-XULT evaluation kit does not include extension boards.

Please refer to the respective

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Power Debugger kit
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Power Debugger is a powerful development tool for debugging and programming AVR microcontrollers using UPDI, JTAG, PDI, debugWIRE, aWire, TPI or SPI target interfaces and ARM® Cortex®-M based SAM microcontrollers using JTAG or SWD target interfaces.

In addition the Power Debugger has two independent current sensing channels for measuring and optimizing the power consumption of

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SAME70 Xplained Kit
SAME70 Xplained Kit ( ATSAME70-XPLD )

The SMART SAM E70 Xplained evaluation kit is ideal for evaluating and prototyping with | SMART SAM S70 and SAM E70 ARM® Cortex®-M7 core- based microcontrollers.

Extension boards for the SAM E70 Xplained can be purchased individually.

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ATSAME70-XULT
ATSAME70-XULT ( DM320113 )

The SAM E70 Xplained Ultra Evaluation Kit is a hardware platform for evaluating the ATSAME70 and ATSAMS70 families of microcontrollers (MCU). Supported by both the Studio and MPLAB X integrated development platforms, the kit provide easy access to the features of the ATSAME70 and is a valuable assistant when integrating the device into a custom design.

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
ATSAMS70Q21A-AN
1.392800
7.833333
144
LQFP
20x20x1.4mm
Matte Tin
e3
ATSAMS70Q21A-ANT
1.392800
2.285714
144
LQFP
20x20x1.4mm
Matte Tin
e3
ATSAMS70Q21B-AN
1.392800
7.833333
144
LQFP
20x20x1.4mm
Matte Tin
e3
ATSAMS70Q21B-ANT
1.392800
2.285714
144
LQFP
20x20x1.4mm
Matte Tin
e3
ATSAMS70Q21A-CNT
0.215400
0.217000
144
LFBGA
10x10x1.4mm
SAC105
e8
ATSAMS70Q21A-CN
0.215400
1.065217
144
LFBGA
10x10x1.4mm
SAC105
e8
ATSAMS70Q21B-CN
0.215400
1.065217
144
LFBGA
10x10x1.4mm
SAC105
e8
ATSAMS70Q21B-CNT
0.215400
0.217000
144
LFBGA
10x10x1.4mm
SAC105
e8
ATSAMS70Q21A-CFN
0.036300
0.555102
144
UFBGA
6x6x0.6mm
LF35
e8
ATSAMS70Q21A-CFNT
0.036300
0.024200
144
UFBGA
6x6x0.6mm
LF35
e8
ATSAMS70Q21B-CFNT
0.036300
0.024200
144
UFBGA
6x6x0.6mm
LF35
e8
ATSAMS70Q21B-CFN
0.036300
0.555102
144
UFBGA
6x6x0.6mm
LF35
e8
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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