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KSZ8995

5-Port 10/100 Ethernet Switch with Fiber Support

Status: Not Recommended for new designs

Features:

  • IEEE 802.1q VLAN support for up to 128 active VLAN groups (full-range 4096 of VLAN IDs)
  • Static MAC table supports up to 32 entries
  • VLAN ID tag/untag options, per port basis
  • Serial management interface (MDC/MDIO) to all PHYs registers and SMI interface (MDC/MDIO) to all registers
  • High-speed SPI (up to 25MHz) and I2C master Interface to all internal registers
  • I/0 pins strapping and EEPROM to program selective registers in unmanaged switch mode
  • Per port, 802.1p and DiffServ-based
  • 1/2/4-queue QoS prioritization selection
  • Programmable weighted fair queuing for ratio control
  • New generation switch with five MACs and five PHYs that are fully compliant with the IEEE 802.3u standard
  • PHYs designed with patented enhanced mixed-signal technology
  • Non-blocking switch fabric assures fast packet delivery by utilizing a 1K MAC address lookup table and a store-and-forward architecture
  • Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port or MII/RMII
  • MIB counters for fully-compliant statistics gathering 34 MIB counters per port
  • Loop-back support for MAC, PHY, and remote diagnostic of failure
  • Full-chip software power-down and per port software power down
  • Energy-detect mode support <100mW full-chip power consumption when all ports have no activity
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Overview
Documents
Development Environment
Similar Devices
RoHS Information
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Device Overview

Summary

The KSZ8995MQX/RQX/FQX/ML is a highly-integrated, Layer 2 managed, five-port switch with numerous features designed to reduce system cost.

Intended for cost sensitive 10/100Mbps five-port switch systems with low power consumption, on-chip termination, and internal core power controllers, it supports high-performance memory bandwidth and shared memory-based switch fabric with non-blocking configuration. Its extensive feature set includes power management, programmable rate limit and priority ratio, tag/port-based VLAN, packets filtering, four queue QoS prioritization, management interfaces, and MIB counters.

The KSZ8995 family provides multiple CPU data interfaces to effectively address both current and emerging fast Ethernet applications when port 5 is configured to separate MAC5 with SW5-MII/RMII and PHY5 with P5-MII/RMII interfaces.

The KSZ8995 family offers three configurations, providing the flexibility to meet different requirements:

- KSZ8995MQX/ML has 5 10/100Base-T/TX transceivers, 1 SW5-MII and 1 P5-MII interface

- KSZ8895RQX has 5 10/100Base-T/TX transceivers, 1 SW5-RMII and 1 P5-RMII interface

- KSZ8895FQX has 4 10/100Base-T/TX transceivers on Ports 1, 2, 3 and 5 (port 3 can be set to the fiber mode). 1 100Base-FX transceivers on Port 4. 1 SW5-MII and 1 P5-MII interface

All registers of MACs and PHYs units can be managed by the SPI or the SMI interface. MIIM registers can be accessed through the MDC/MDIO interface.

EEPROM can set all control registers for the unmanaged mode. KSZ8995MQX/RQX/FQX are 128-pin PQFP package. KSZ8995ML is 128-pin LQFP package.

Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.

Please consider this device KSZ8895, KSZ8795

Additional Features
      Advanced Switch Features
      • IEEE 802.1q VLAN support for up to 128 active VLAN groups (full-range 4096 of VLAN IDs)
      • Static MAC table supports up to 32 entries
      • VLAN ID tag/untag options, per port basis
      Comprehensive Configuration Register Access
      • Serial management interface (MDC/MDIO) to all PHYs registers and SMI interface (MDC/MDIO) to all registers
      • High-speed SPI (up to 25MHz) and I2C master Interface to all internal registers
      • I/0 pins strapping and EEPROM to program selective registers in unmanaged switch mode
      QoS/CoS Packet Prioritization Support
      • Per port, 802.1p and DiffServ-based
      • 1/2/4-queue QoS prioritization selection
      • Programmable weighted fair queuing for ratio control
      Integrated 5-Port 10/100 Ethernet Switch
      • New generation switch with five MACs and five PHYs that are fully compliant with the IEEE 802.3u standard
      • PHYs designed with patented enhanced mixed-signal technology
      • Non-blocking switch fabric assures fast packet delivery by utilizing a 1K MAC address lookup table and a store-and-forward architecture
      Switch Monitoring Features
      • Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port or MII/RMII
      • MIB counters for fully-compliant statistics gathering 34 MIB counters per port
      • Loop-back support for MAC, PHY, and remote diagnostic of failure

      Low-Power Dissipation

      Full-chip hardware power-down

      • Full-chip software power-down and per port software power down
      • Energy-detect mode support <100mW full-chip power consumption when all ports have no activity
Parametrics
Name
Value
Description
5-Port 10/100 Ethernet Switch with MII/RMII
Ethernet Bandwidth
10/100Mbps
MAC
5
PHY
5
TX/RX RAM Buffer(Bytes)
n/a
Interrupt Pin
Yes
LEDs
15
Op. Voltage (V)
3.3
Interface
MII/RMII
Temp. Range Min. (°C)
-40
Temp. Range Max. (°C)
85
# of Ports
5
Managed
Yes
Copper Support
10/100 (5)
Fiber Support
100FX (2)
MII
Yes
RMII
Yes
Supply Voltage (V)
3.3
Internal LDO
Yes cntlr
Vdd I/O (V)
1.8/2.5/3.3
LinkMD Cable Diag
Yes
On-Chip Termination
Yes
ESD Rating (KV)
1.5KV
Smart Power Adjust
Yes
Largest Pkt-Size Bytes
2000
IPV6
Yes
# of VLAN
128
Flow Ctrl
Yes
Rate Limiting
Yes
Rapid Spanning Tree
Yes
Static MAC Addr
Yes

Documents

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Data Sheet

04/19/2016
196KB
04/19/2016
797KB
04/19/2016
1061KB
04/19/2016
1054KB
04/19/2016
219KB
04/19/2016
352KB

Design Guides

02/19/2016
3656KB
02/19/2016
2180KB
02/19/2016
4552KB
02/19/2016
4552KB
02/19/2016
4900KB
02/19/2016
5074KB
02/19/2016
2302KB

IBIS

10/15/2015
438KB
10/15/2015
438KB
10/15/2015
438KB

Development tools data is currently unavailable.

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (grams)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
KSZ8995FQ
1.761500
4.015152
128
PQFP
14x20x2.72mm
Matte Tin
e3
KSZ8995FQI
1.761500
4.015152
128
PQFP
14x20x2.72mm
Matte Tin
e3
KSZ8995M
1.761500
4.015152
128
PQFP
14x20x2.72mm
Matte Tin
e3
KSZ8995MA
1.761500
4.015152
128
PQFP
14x20x2.72mm
Matte Tin
e3
KSZ8995MAI
1.761500
4.015152
128
PQFP
14x20x2.72mm
Matte Tin
e3
KSZ8995MI
1.761500
4.015152
128
PQFP
14x20x2.72mm
Matte Tin
e3
KSZ8995X
1.761500
4.015152
128
PQFP
14x20x2.72mm
Matte Tin
e3
KSZ8995XA
1.761500
4.015152
128
PQFP
14x20x2.72mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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