Status: Not Recommended for new designs
The KSZ8995MQX/RQX/FQX/ML is a highly-integrated, Layer 2 managed, five-port switch with numerous features designed to reduce system cost.
Intended for cost sensitive 10/100Mbps five-port switch systems with low power consumption, on-chip termination, and internal core power controllers, it supports high-performance memory bandwidth and shared memory-based switch fabric with non-blocking configuration. Its extensive feature set includes power management, programmable rate limit and priority ratio, tag/port-based VLAN, packets filtering, four queue QoS prioritization, management interfaces, and MIB counters.
The KSZ8995 family provides multiple CPU data interfaces to effectively address both current and emerging fast Ethernet applications when port 5 is configured to separate MAC5 with SW5-MII/RMII and PHY5 with P5-MII/RMII interfaces.
The KSZ8995 family offers three configurations, providing the flexibility to meet different requirements:
- KSZ8995MQX/ML has 5 10/100Base-T/TX transceivers, 1 SW5-MII and 1 P5-MII interface
- KSZ8895RQX has 5 10/100Base-T/TX transceivers, 1 SW5-RMII and 1 P5-RMII interface
- KSZ8895FQX has 4 10/100Base-T/TX transceivers on Ports 1, 2, 3 and 5 (port 3 can be set to the fiber mode). 1 100Base-FX transceivers on Port 4. 1 SW5-MII and 1 P5-MII interface
All registers of MACs and PHYs units can be managed by the SPI or the SMI interface. MIIM registers can be accessed through the MDC/MDIO interface.
EEPROM can set all control registers for the unmanaged mode. KSZ8995MQX/RQX/FQX are 128-pin PQFP package. KSZ8995ML is 128-pin LQFP package.
Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.
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