Microchip Technology Inc
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ATSAM3U1C

Status: Not Recommended for new designs

Features:

  • ARM Cortex-M3 revision 2.0 running at up to 96 MHz
  • Memory Protection Unit (MPU)
  • Thumb®-2 instruction set
  • 64 Kbytes Dual Plane embedded Flash, 128-bit wide access, memory accelerator, dual bank
  • 20 Kbytes embedded SRAM
  • 16 Kbytes ROM with embedded bootloader routines (UART, USB) and IAP routines
  • Static Memory Controller (SMC): SRAM, NOR, NAND support. NAND Flash controller with 4 Kbytes RAM buffer and ECC
  • External Bus Interface - 8 or 16 bits, 4 chip selects, 24-bit address
  • Embedded voltage regulator for single-supply operation
  • POR, BOD and Watchdog for safe reset
  • Quartz or resonator oscillators: 3 to 20 MHz main and optional low power 32.768 kHz for RTC or device clock
  • High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz Default Frequency for fast device startup
  • Slow Clock Internal RC oscillator as permanent clock for device clock in low power mode
  • One PLL for device clock and one dedicated PLL for USB 2.0 High Speed Device
  • 17 Peripheral DMA Controller (PDC) channels and 4-channel central DMA
  • Sleep, Wait, and Backup modes, down to 1.65 μA in Backup mode with RTC, RTT, and GPBR
  • 100-lead LQFP – 14 × 14 mm, pitch 0.5 mm
  • 100-ball TFBGA – 9 × 9 mm, pitch 0.8 mm
  • Industrial (-40° C to +85° C)
  • USB 2.0 Device: 480 Mbps, 4-Kbyte FIFO, up to 7 bidirectional Endpoints, dedicated DMA
  • 3 USARTs (ISO7816, IrDA®, Flow Control, SPI, Manchester support) and one UART
  • 2 TWI (I2C compatible)
  • 1 Serial Perpheral Interface (SPI)
  • 1 Synchronous Serial Controller (SSC) (I2S)
  • 1 High Speed Multimedia Card Interface (HSMCI) (SDIO/SD/MMC)
  • 3-channel 16-bit Timer/Counter (TC) for capture, compare and PWM
  • 4-channel 16-bit PWM (PWMC)
  • 32-bit Real-time Timer (RTT) and Real-time Clock (RTC) with calendar and alarm features
  • 57 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and on-die Series Resistor Termination
  • Three 32-bit Parallel Input/Output Controllers
  • 4-channel 12-bit 1 msps ADC with differential input mode and programmable gain stage
  • 4-channel 10-bit ADC
  • Serial Wire/JTAG Debug Port(SWJ-DP)
  • Debug access to all memories and registers in the system, including Cortex-M4 register bank when the core is running, halted, or held in reset.
  • Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access.
  • Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches.
  • Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling.
  • Instrumentation Trace Macrocell (ITM) for support of printf style debugging.
  • IEEE1149.1 JTAG Boundary-scan on all digital pins.
  • ASF-Atmel software Framework – SAM software development framework
  • Integrated in the Atmel Studio IDE with a graphical user interface or available as standalone for GCC, IAR compilers.
  • DMA support, Interrupt handlers Driver support
  • USB, TCP/IP, Wi-Fi and Bluetooth, Numerous USB classes, DHCP and Wi-Fi encryption Stacks
  • RTOS integration, FreeRTOS is a core component
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Overview
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Development Environment
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RoHS Information
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Device Overview

Summary

Microchip's ARM®-based SAM3U1C is a member of the SAM3U family of flash microcontrollers based on the high-performance 32-bit ARM Cortex®-M3 RISC processor.

It operates at a maximum speed of 96MHz and features 64KB of flash memory and 20KB of SRAM.

The peripheral set includes a High Speed USB device and PHY at 480Mbps, high-speed multimedia card interface for SDIO/SD/MMC, a 16-bit external bus interface supporting NAND flash, three USARTs, TWI (I2C), four SPIs, I2S, four PWM timers, three 16-bit timers, RTC, four 12-bit and four 10-bit ADCs.

The architecture is designed to sustain high-speed data transfers. The multi-layer bus matrix, multiple SRAM banks, PDC, and DMA support parallel tasks and maximize data throughput.

The SAM3U1C operates from 1.62V to 3.6V and is available in 100-pin LQFP and BGA packages.

Additional Features

    Core

    • ARM Cortex-M3 revision 2.0 running at up to 96 MHz

    • Memory Protection Unit (MPU)

    • Thumb®-2 instruction set

    Memories

    • 64 Kbytes Dual Plane embedded Flash, 128-bit wide access, memory accelerator, dual bank

    • 20 Kbytes embedded SRAM

    • 16 Kbytes ROM with embedded bootloader routines (UART, USB) and IAP routines

    • Static Memory Controller (SMC): SRAM, NOR, NAND support. NAND Flash controller with 4 Kbytes RAM buffer and ECC

    • External Bus Interface - 8 or 16 bits, 4 chip selects, 24-bit address

    System

    • Embedded voltage regulator for single-supply operation

    • POR, BOD and Watchdog for safe reset

    • Quartz or resonator oscillators: 3 to 20 MHz main and optional low power 32.768 kHz for RTC or device clock

    • High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz Default Frequency for fast device startup

    • Slow Clock Internal RC oscillator as permanent clock for device clock in low power mode

    • One PLL for device clock and one dedicated PLL for USB 2.0 High Speed Device

    • 17 Peripheral DMA Controller (PDC) channels and 4-channel central DMA

    Low Power modes

    • Sleep, Wait, and Backup modes, down to 1.65 μA in Backup mode with RTC, RTT, and GPBR

    Package

    • 100-lead LQFP – 14 × 14 mm, pitch 0.5 mm

    • 100-ball TFBGA – 9 × 9 mm, pitch 0.8 mm

    Temperature operating range

    • Industrial (-40° C to +85° C)

    Peripheral Features

    • USB 2.0 Device: 480 Mbps, 4-Kbyte FIFO, up to 7 bidirectional Endpoints, dedicated DMA

    • 3 USARTs (ISO7816, IrDA®, Flow Control, SPI, Manchester support) and one UART

    • 2 TWI (I2C compatible)

    • 1 Serial Perpheral Interface (SPI)

    • 1 Synchronous Serial Controller (SSC) (I2S)

    • 1 High Speed Multimedia Card Interface (HSMCI) (SDIO/SD/MMC)

    • 3-channel 16-bit Timer/Counter (TC) for capture, compare and PWM

    • 4-channel 16-bit PWM (PWMC)

    • 32-bit Real-time Timer (RTT) and Real-time Clock (RTC) with calendar and alarm features

    I/O

    • 57 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and on-die Series Resistor Termination

    • Three 32-bit Parallel Input/Output Controllers

    Analog Features

    • 4-channel 12-bit 1 msps ADC with differential input mode and programmable gain stage

    • 4-channel 10-bit ADC

    Debugger Development Support

    • Serial Wire/JTAG Debug Port(SWJ-DP)

    • Debug access to all memories and registers in the system, including Cortex-M4 register bank when the core is running, halted, or held in reset.

    • Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access.

    • Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches.

    • Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling.

    • Instrumentation Trace Macrocell (ITM) for support of printf style debugging.

    • IEEE1149.1 JTAG Boundary-scan on all digital pins.

    Integrated Software Libraries and Tools

    • ASF-Atmel software Framework – SAM software development framework

    • Integrated in the Atmel Studio IDE with a graphical user interface or available as standalone for GCC, IAR compilers.

    • DMA support, Interrupt handlers Driver support

    • USB, TCP/IP, Wi-Fi and Bluetooth, Numerous USB classes, DHCP and Wi-Fi encryption Stacks

    • RTOS integration, FreeRTOS is a core component

Parametrics
Name
Value
Part Family
ATSAM3U1C
Max CPU Speed MHz
96
Program Memory Size (KB)
64
SRAM (KB)
20
SDIO/SD-CARD/eMMC
1
Temperature Range (C)
-40 to 85
Operating Voltage Range (V)
1.62 to 3.6
Direct Memory Access Channels
21
SPI
4
I2C
1
Peripheral Pin Select / Pin Muxing
Yes
Number of USB Modules
1
ADC Input
8
Max ADC Resolution (Bits)
12
Max ADC Sampling Rate (ksps)
1000
Input Capture
6
Max 16-bit Digital Timers
3
Parallel Port
EBI
Internal Oscillator
4,8,12Mhz,32Khz
Hardware RTCC/RTC
Yes
Max I/O Pins
57
Pincount
100
Quadrature Encoder Interface
1

Documentation data is currently unavailable.

Development Environment

  • Demo & Evaluation Boards
Demo & Evaluation Boards
Power Debugger kit
Power Debugger kit ( ATPOWERDEBUGGER )

Power Debugger is a powerful development tool for debugging and programming AVR microcontrollers using UPDI, JTAG, PDI, debugWIRE, aWire, TPI or SPI target interfaces and ARM® Cortex®-M based SAM microcontrollers using JTAG or SWD target interfaces.

In addition the Power Debugger has two independent current sensing channels for measuring and optimizing the power consumption of

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SAM-ICE
SAM-ICE ( AT91SAM-ICE )

SAM-ICE is a JTAG emulator designed for SAMA5, SAM3, SAM4, SAM7 and SAM9 ARM® core-based MCUs and MPUs, including Thumb mode. It supports download speeds up to 720K Bytes per second and maximum JTAG speeds up to 12 MHZ. It also supports Serial Wire Debug (SWD) and Serial Wire Viewer (SWV) from SAM-ICE hardware V6.

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Atmel-ICE Full Kit
Atmel-ICE Full Kit ( ATATMEL-ICE )

Atmel-ICE is a powerful development tool for debugging and programming ARM® Cortex®-M based SAM and AVR microcontrollers with on-chip debug capability.

Atmel-ICE supports:

  • Programming and on-chip debugging of all AVR 32-bit MCUs on both JTAG and aWire interfaces
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Product
Pins
Flash (KB)
RAM (B)
Price 5K
Notes
100
64
20,480
$2.34
 

RoHS Information

Part Number
Device Weight
Shipping Weight
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
ATSAM3U1CB-AU
0.580400
6.666667
100
LQFP
14x14x1.4mm
Matte Tin
e3
Rohs icon
efup china icon
ATSAM3U1CB-CU
0.139600
0.696154
100
TFBGA
9x9x1.2mm
SAC105
e8
Rohs icon
efup china icon
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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