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ZL30168

4-Ch Line Card Network Synchronizer

Status: In Production

Features:

  • Four Independent clock channels
  • Programmable synthesizers generate any clock rate from 1 Hz to 750 MHz
  • Four programmable digital PLLs/Numerically Controlled Oscillators (NCOs)/OTN clock generators based on buffer-fill levels
  • Programmable digital PLLs synchronizes to any clock rate from 1 kHz to 750 MHz
  • Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FEC
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The ZL30168 is a Quad Channel Enhanced Clock Translator.  Four independent channels can function as DPLLs, NCO's or OTN clock generators based on buffer-fill levels.  It can accept any frequency from 1kHz to 750MHz and generate any frequency from 1Hz to 750MHz to support any communication service over optical networks. The ZL30168 operates from a single crystal resonator or clock oscillator supporting eight input references configurable as single ended or differential. It supports eight high performance LVPECL outputs and eight high performance LVCMOS outputs.

Additional Features
  • Four Independent clock channels
  • Programmable synthesizers generate any clock rate from 1 Hz to 750 MHz
  • Four programmable digital PLLs/Numerically Controlled Oscillators (NCOs)/OTN clock generators based on buffer-fill levels
  • Programmable digital PLLs synchronizes to any clock rate from 1 kHz to 750 MHz
  • Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FEC
  • Digital PLLs filter jitter with bandwidths from 5 to 896 Hz
  • Automatic hitless reference switching and digital holdover on reference fail
  • Reference inputs:
  • - Eight reference inputs configurable as single ended or differential
  • - LVCMOS (1kHz to 177.5 MHz)
  • - LVDS or LVPECL (1kHz to 750MHz)
  • Any Output Frequency:
  • - 8 High Performance LVCMOS outputs supporting any frequency 1 Hz to 177.5 MHz
  • - 8 High Performance LVPECL outputs supporting any frequency 1 Hz to 750 MHz
  • - Dynamic Frequency programming
  • Easy Configuration: field programmable via SPI/I2C interface
  • Modes of Operation:
  • - Integer, Fractions or Ratio (FEC support)
  • - Each clock channel can work in either PLL, NCO or Buffer Fill mode
  • Reduces BOM Cost and Board Space:
  • - Replaces four devices with single channel PLLs
  • - Package: 13 x 13mm
  • Low Power: < 2W
  • Increases Design efficiency:
  • - Easy programming: SPI/I2C
  • - Up to four unique customer defined default configurations, including input/output frequencies, are available via OTP (One Time Programmable) memory
  • Applications:
    • - OTN muxponders
    • - 10 Gigabit Line cards
    • - Synchronous Ethernet, 10 GBASE-R and 10 GBASE-W
    • - SONET/SDH, Fibre channel, XAUI
Parametrics
Name
Value
Type
Advanced
DPLLs or Paths
4
DPLL Bandwidth (Hz)
5-896
Inputs
8 D/SE
Diff Outputs
8
CMOS Outputs
8
Low-Jitter Synthesizers
4
Typical Jitter (12kHz-20MHz) fs RMS
650
Diff InputFreq Range
1 kHz-750 MHz
Output Freq Range
1 Hz-177.5 MHz
NV Memory
OTP
NCO ppb
0.001
Align
-

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Dimension
Solder Composition
JEDEC Indicator
RoHS
China EFUP
ZL30168GDG2
0.629100
1.200000
144
BGA
13x13x1.95mm
SAC305
e1
ZL30168-GDG2-WD
0.629100
1.200000
144
BGA
13x13x1.95mm
SAC305
e1
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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