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ZL30160

4-Ch Line Card Network Synchronizer

Status: In Production

Features:

  • Four independent clock channels
  • Programmable synthesizers generate any clock-rate from 1 kHz to 720 MHz
  • Two precision synthesizers generate clocks with jitter below 0.7 ps RMS for 10 G PHYs
  • Two general purpose synthesizers generate a wide range of digital bus clocks
  • Programmable digital PLLs synchronize to any clock rate from 1 kHz to 720 MHz
  • Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FEC rates
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The ZL30160 Four Channel Universal Clock Translator, part of Microsemi's ClockCenter platform of Synchronous Clock devices, delivers industry leading synchronization performance for high-speed, complex applications.  The highly integrated and programmable solution provides translation from any input reference frequency to any output clock frequency with jitter performance that can directly drive 10 G PHY devices.
The ZL30160 integrates 4 independent digital PLLs, accepts 4 input references and generates 20 programmable clock outputs.  The highly integrated solution allows designers to replace multiple components with a single chip, simplifying design and reducing component count and power.

Additional Features
  • Four independent clock channels
  • Programmable synthesizers generate any clock-rate from 1 kHz to 720 MHz
  • Two precision synthesizers generate clocks with jitter below 0.7 ps RMS for 10 G PHYs
  • Two general purpose synthesizers generate a wide range of digital bus clocks
  • Programmable digital PLLs synchronize to any clock rate from 1 kHz to 720 MHz
  • Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FEC rates
  • Digital PLLs filter jitter from 14 Hz, 28 Hz, 56 Hz, 112 Hz, 224 Hz, 448 Hz or 896 Hz
  • Automatic hitless reference switching and digital holdover on reference fail
  • Four reference inputs configurable as single ended or differential
  • Eight LVPECL outputs and four LVCMOS outputs
  • Eight outputs configurable as LVCMOS or LVDS/LVPECL/HCSL
  • Operates from a single crystal resonator or clock oscillator
  • Customer defined default configuration, including input/output frequencies, is available via OTP (One Time Programmable) memory
  • Configurable via SPI/I2C interface
  • Applications/Uses
    • - 10 Gigabit linecards
    • - Synchronous Ethernet, 10GBASE-R and 10GBASE-W
    • - OTN multiplexers and transponders
    • - SONET/SDH, Fibre Channel, XAUI
Parametrics
Name
Value
Type
Advanced
DPLLs or Paths
4
DPLL Bandwidth (Hz)
14-896
Inputs
4 D/SE
Diff Outputs
8
CMOS Outputs
12
Low-Jitter Synthesizers
2
General Purpose Synthsizers
2
Typical Jitter (12kHz-20MHz) fs RMS
700
Diff InputFreq Range
1 kHz-750 MHz
Output Freq Range
1 kHz-750 MHz
NV Memory
OTP
NCO ppb
-
Align
-

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Dimension
Solder Composition
JEDEC Indicator
RoHS
China EFUP
ZL30160GGG2
0.318400
1.690476
100
LBGA
11x11x1.55mm
SAC305
e1
ZL30160-GGG2-WH
0.318400
1.690476
100
LBGA
11x11x1.55mm
SAC305
e1
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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