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SY100EP15V

Status: In Production

Features:

  • High-speed 1:4 PECL/ECL fanout buffer
  • 2:1 multiplexer input
  • >2.5GHz fMAX (toggle)
  • <225ps rise/fall times
  • <25ps within device skew
  • <425ps propagation delay (CLK-to-Q)
  • <1psRMS cycle-to-cycle jitter
  • <20psPP total jitter
  • Flexible power supply: 3.3V/5V
  • Wide operating temperature range: –40°C to +85°C
  • VBB reference for AC-coupled or single-ended applications
  • Output enable/disable function
  • 100K PECL/ECL compatible logic
  • Input accepts PECL/LVPECL/ECL/HSTL logic levels
  • Available in a 16-pin TSSOP package
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The SY100EP15V is a high-speed, low-skew, PECL/ECL 1:4 precision fanout buffer with a 2:1 mux front end in a small 16-pin TSSOP package. The 2:1 mux input accepts a single-ended PECL/ECL source (CLK1) and a differential PECL/ECL/HSTL source (CLK0). All I/O pins are 100K EP PECL/ECL logic compatible.

AC performance is guaranteed over the industrial –40°C to +85°C temperature range and 3.3V to 5V supply voltage. This device will operate in PECL/LVPECL or ECL/LVECL mode. For clock applications, the high-speed design combined with an extremely fast rise/fall time of less than 225ps produces a toggle frequency as high as 2.5GHz (~400mVPP swing).A VBB output reference pin is available for AC–coupled and single-ended input applications. In addition, a synchronous output enable function is provided.The SY100EP15V is part of Micrel’s high-speed, precision edge timing and distribution family.

For applications that require a different I/O combination, consult Micrel's website and choose from a comprehensive product line of high-speed, low-skew fanout buffers, translators, and clock dividers.

Additional Features
    • High-speed 1:4 PECL/ECL fanout buffer
    • 2:1 multiplexer input
    • Guaranteed AC parameters over temp/voltage:
      • >2.5GHz fMAX (toggle)
      • <225ps rise/fall times
      • <25ps within device skew
      • <425ps propagation delay (CLK-to-Q)
    • Low jitter design:
      • <1psRMS cycle-to-cycle jitter
      • <20psPP total jitter
    • Flexible power supply: 3.3V/5V
    • Wide operating temperature range: –40°C to +85°C
    • VBB reference for AC-coupled or single-ended applications
    • Output enable/disable function
    • 100K PECL/ECL compatible logic
    • Input accepts PECL/LVPECL/ECL/HSTL logic levels
    • Available in a 16-pin TSSOP package
Parametrics
Name
Value
Product Type
Fanout & Buffer and Drivers
Description
2:5
Input
PECL, LVPECL, ECL, HSTL
Output
LVPECL
Supply Voltage
2.5/3.3/5
Max Freq (GHz)
2.5
Max Prop Delay (ps)
425
Icc (mA)
75
Max Within Device Skew (ps)
25
OE
True
RPE
False
FSI
False
Input Mux
True
Input EQ
False
Output Type
LVPECL

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Dimension
Solder Composition
JEDEC Indicator
RoHS
China EFUP
SY100EP15VK4G-TR
0.000000
0.150000
16
TSSOP
4.4mm
NiPdAu
e4
SY100EP15VK4G
0.000000
0.170213
16
TSSOP
4.4mm
NiPdAu
e4
SY100EP195VTG-TR
0.132500
0.654600
32
TQFP
7x7x1.0mm
NiPdAu
e4
SY100EP195VTG
0.132500
0.984400
32
TQFP
7x7x1.0mm
NiPdAu
e4
1950BV00TP9252
0.132500
0.654600
32
TQFP
7x7x1.0mm
NiPdAu
e4
1950BV00TP9253
0.132500
0.984400
32
TQFP
7x7x1.0mm
NiPdAu
e4
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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