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SAMV71Q21RT

Status: In Production

Features:

  • ARM® Cortex®-M7 running up to 300MHz
  • 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
  • Single- and double-precision HW Floating Point Unit (FPU)
  • Memory Protection Unit (MPU) with 16 zones
  • DSP Instructions, Thumb®-2 Instruction Set
  • Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
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Device Overview

Summary

The SAMV71Q21RT is the radiation tolerant version of the popular Microchip SAMV71Q21 based on the high-performance 32-bit ARM Cortex-M7 processor with a Double Precision Floating Point Unit (FPU). These devices operate at up to 300MHz and feature up to 2048 Kbytes of Flash, and up to 384 Kbytes of multi-port SRAM which is configurable Instruction and Data Tightly Couple Memories to leverage the advanced DSP capabilities of the core.
The SAM V71 series includes a 10/100 Ethernet MAC w/IEEE1588, HS USB Interface with integrated PHY, dual CAN-FD, QSPI, MediaLB, CMOS Imager interface, TDM/I2S (SSC).
This space-qualified version of the product adds:  Ceramic & Hermetic packages, extended temperature range -55C to 125C, extended qualification flow equivalent to QML-V or QML-Q space grade.  Radiation performance for the SAMV71Q21RT:  SEL LET > 60 MeV.cm2/mg (at 125C), and TID up to 30 Krad (Si).

Additional Features
  • Core
    • ARM® Cortex®-M7 running up to 300MHz
    • 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
    • Single- and double-precision HW Floating Point Unit (FPU)
    • Memory Protection Unit (MPU) with 16 zones
    • DSP Instructions, Thumb®-2 Instruction Set
    • Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
  • Memories
    • 2048 Kbytes embedded Flash with unique identifier and user signature for user-defined data
    • 384 Kbytes embedded Multi-port SRAM
    • Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x 128 Kbytes)
    • 16 Kbytes ROM with embedded Bootloader routines (UART0, USB) and IAP routines
    • 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, LCD module, NOR and NAND Flash with on-the-fly scrambling
    • 16-bit SDRAM Controller (SDRAMC) interfacing up to 256 MB and with on-the-fly scrambling
  • System
    • Embedded voltage regulator for single-supply operation
    • Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
    • Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
    • RTC with Gregorian calendar mode, waveform generation in low-power modes
    • RTC counter calibration circuitry compensates for 32.768 kHz crystal frequency variations
    • 32-bit low-power Real-time Timer (RTT)
    • High-precision Main RC oscillator with 12 MHz default frequency for device startup. In-application trimming access for frequency adjustment. 8/12 MHz are factory-trimmed.
    • 32.768 kHz crystal oscillator or Slow RC oscillator as source of low-power mode device clock (SLCK)
    • One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
    • Temperature Sensor
    • One dual-port 24-channel central DMA Controller (XDMAC)
  • Low-Power Features
    • Low-power Sleep, Wait and Backup modes, with typical power consumption down to 1.1 μA in Backup mode with RTC, RTT and wakeup logic enabled
    • Ultra-low-power RTC and RTT
    • 1 Kbyte of backup RAM (BRAM) with dedicated regulator
  • Peripherals
    • One Ethernet MAC (GMAC) 10/100 Mbps in MII mode and RMII with dedicated DMA. IEEE1588 PTP frames and 802.3az Energy-efficiency support. Ethernet AVB support with IEEE802.1AS Timestamping and IEEE802.1Qav credit-based traffic-shaping hardware support
    • 12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
    • Two master Controller Area Networks (MCAN) with Flexible Data Rate (CAN-FD) with SRAM-based mailboxes, time- and event-triggered transmission
    • MediaLB® device with 3-wire mode, up to 1024 x Fs speed, supporting MOST25 and MOST50 networks
    • Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modem modes; USART1 supports LON mode.
    • Five 2-wire UARTs with SleepWalking™ support
    • Three Two-Wire Interfaces (TWIHS) (I2C-compatible) with SleepWalking™ support
    • Quad I/O Serial Peripheral Interface (QSPI) interfacing up to 256 MB Flash and with eXecute-In-Place and on-the-fly scrambling
    • Two Serial Peripheral Interfaces (SPI)
    • One Serial Synchronous Controller (SSC) with I2S and TDM support
    • Two Inter-IC Sound Controllers (I2SC)
    • One High-speed Multimedia Card Interface (HSMCI) (SDIO/SD Card/e.MMC)
    • Four Three-Channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes, constant on time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
    • Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWM for motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control.
    • Two Analog Front-End Controllers (AFEC), each supporting up to 12 channels with differential input mode and programmable gain stage, allowing dual sample-and-hold at up to 1.7 Msps. Offset and gain error correction feature.
    • One 2-channel 12-bit 1 Msps-per-channel Digital-to-Analog Controller (DAC) with Differential and Over Sampling modes
    • One Analog Comparator Controller (ACC) with flexible input selection, selectable input hysteresis
  • I/O
    • Up to 114 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and On-die Series Resistor Termination
    • Five Parallel Input/output Controllers (PIO)
  • Voltage
    • Single supply voltage from 3.0V to 3.6V
  • Radiation Performances
    • No Single Event Latch-up Below an LET Threshold of 60 MeV.cm2 /mg @125°C
    • Total Ionizing Dose of 30 krad(Si)
  • Packages
    • CQFP144, 144-lead CQFP, 22 x 22mm, pitch 0.5 mm
    • LQFP144, 144-lead LQFP, 20 x 20mm, pitch 0.5 mm
Parametrics
Name
Value
SPI
2
CPU
Rad Tol 32-bit ARM
External Bus Interface
2
Max I/O Pins
114
I/O Supply Class Max
3.6
I2C
2
I/O Supply Class Min
3
Debug Interface
SWD
Output Compare Channels
2
Temp# Range Range (deg C)
-55 to 125
Flash (kBytes)
2048
Self Program Memory
Yes
Analog Comparators
4
UART
5
Ext Interrupts
114
Input Capture Channels
4
PWM Channels
2
RTC
Counter
SRAM (kBytes)
384
Timers
4
Max# Operating Freq# (MHz)
300
MPU / MMU
yes / no
Pin Count
144
ADC Speed (ksps)
1700
Watchdog
Yes
ADC Resolution (bits)
12
32kHz RTC
Yes
Calibrated RC Oscillator
Yes
CAN
Yes
LIN
Yes

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Development Environment

  • Integrated Development Environments
  • Demo & Evaluation Boards
Integrated Development Environments
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Demo & Evaluation Boards
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