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PM8566

Switchtec PFX-L Fanout 96xG3 PCIe Switch

Status: In Production

Features:

  • Most flexible per port bifurcation in the industry
  • 96 lanes
  • 6 virtual switch partitions for efficient use of system resources
  • Logical non-transparent (NT) interconnect allows for larger topologies
  • Hot-plug controllers, end-to-end data integrity protection, high-quality, and low-power fifth generation SERDES
  • Supports 1+1 and N+1 failover mechanisms
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The Switchtec PM8566 PFX-L Fanout-Lite PCIe Gen 3 fanout switch is a high reliability PCIe Base Specification 3.1-compliant switch supporting 96 lanes, 6 virtual switch partitions, 24 Non-Transparent Bridges (NTBs), hot- and surprise-plug controllers for each port, advanced error containment, and comprehensive diagnostics and debug capabilities.

For product comparison, please consider: PM8565, PM8564, PM8563, PM8562, PM8561

Additional Features
  • Most flexible per port bifurcation in the industry
  • 96 lanes
  • 6 virtual switch partitions for efficient use of system resources
  • Logical non-transparent (NT) interconnect allows for larger topologies
  • Hot-plug controllers, end-to-end data integrity protection, high-quality, and low-power fifth generation SERDES
  • Supports 1+1 and N+1 failover mechanisms
  • NT address translation using direct windows and multiple sub-windows per BAR
  • Error Containment
    • Advanced Error Reporting (AER) on all ports
    • Hot- plug controllers
    • GPIOs configurable for different cable/connector standards
  • PCIe Interfaces
    • Passive, managed, and optical cables
    • SHPC-enabled slot and edge connectors
  • Diagnostics and Debug
    • Transaction Layer Packet (TLP) generator for testing and debugging of links and error handling
    • Real-time eye capture
    • Any-to-any port mirroring for debug purposes
    • External loopback at PHY and TLP layers
    • Errors, statistics, performance, and TLP latency counters
  • Peripheral I/O Interfaces
    • Up to two (master/slave) two-wire interfaces (TWIs) with SMBus support
    • Up to 78 parallel GPIO pins
    • 1 UART
    • 1 QSPI with optional inline ECC
    • JTAG and EJTAG interface
  • High-speed I/O
    • PCIe Gen 3 8 GT/s
    • Supports PCIe-compliant link training and manual PHY configuration
  • Power Management
    • Active State Power Management (ASPM)
    • Software controlled power management
  • Chiplink Diagnostic Tools
    • Extensive debug, diagnostics, configuration, and analysis tools with an intuitive GUI
    • Access to configuration data, management capabilities, and signal integrity analysis tools (such as real-time eye capture)
    • Connects to device over in-band PCIe or sideband signals (UART, TWI, and EJTAG)
  • Evaluation Kit
    • PM5461-KIT—PSX/PFX 96/80/64xG3, 1-Slot, 16 HD Evaluation Kit
Parametrics
Name
Value
Lanes
96
Ports
24
NTBs
2
Hot Plug Controllers
6
Power Dissipation
29.3
Bandwidth
174

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (grams)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
PM8566B-FEI
12.586200
18.380952
1311
BBGA
37.5x37.5x3.40mm
SAC305
e1
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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