Status: End of Life
The RESET input functions as a power-on reset when connected to an external capacitor. The FAULT output indicates an overcurrent condition and is cleared after 4 consecutive cycles with no overcurrent condition. A logic low on RESET or ENABLE clears the FAULT output. It is active-low and open-drain to allow wire OR’ing of multiple drivers. PGATE and NGATE are controlled independently by logic inputs PIN and NIN when the MODE pin is at logic high. A logic high on PIN will turn on the external P-channel MOSFET. Similarly, a logic high on NIN will turn on the external N-channel MOSFET. Lockout circuitry prevents the N and P switches from turning on simultaneously. A pulse width limiter restricts pulse widths to no less than 100 - 200ns. For applications where a single control input is desired, the MODE pin should be connected to SGND. The PWM control signal is then input to the NIN pin. A user-adjustable deadband in the control logic ensures break-before-make on the outputs, thus avoiding cross conduction on the high voltage output during switching. A logic high on NIN will turn the external P-Channel MOSFET on and the N-Channel off, and vice versa. The IC can be powered down by applying a logic low on the ENABLE pin, placing both external MOSFETs in the off state.
Development tools data is currently unavailable.
For pricing and availability, contact Microchip Local Sales.