Microchip logo
  • All
  • Products
  • Documents
  • Applications Notes


Configuration of USB7202/USB7206/USB725x
Andrew Rogers
The USB7202/USB7206/USB7250/USB7251/USB7252/USB7256 can be configured through: Hardware configuration straps SMBus during start-up configuration stage (SOC_CFG) SMBus during hub operational stages (during runtime) One-Time Programmable (OTP) memory A USB interface during hub operational stages (during runtime) An external Serial Peripheral Interface (SPI) Flash SMBus Configuration: The hub may be configured via the SMBus slave interface during the hub’s start-up configuration stage (or SOC_CFG). To hold the hub in the SOC_CFG stage, the CONFIG_STRAP pins must be set with the correct configuration mode (CONFIG1 for USB7202/USB7206/USB7251/US7252/USB7256, and CONFIG1, 2, 3, or 5 for USB7250) and the SMBus slave clock and data pins must be sampled as ‘high’ (10k pull-up resistors to 3.3V recommended) at power-on or when RESET_N is deasserted. Once in the configuration stage, any of the registers may be reconfigured. The hub waits in SOC_CFG indefinitely until it receives the special Attach command. After the hub has exited the SOC_CFG stage, the configuration registers may still be manipulated via SMBus. This may be useful for enabling an external SOC to control the hub’s GPIOs or to check certain hub status registers. OTP Memory: The hub’s registers may be configured via the hub’s internal OTP memory. Any register may be given a new default value. The OTP memory is 8 kB, and each bit within the OTP memory may be set once, but never cleared. The OTP commands are loaded sequentially, so it is possible to overwrite a previously programmed register setting by programming that register subsequently with a new value. The OTP memory may be programmed via the USB interface or via SMBus. USB Interface: All registers are accessible from the USB host using vendor-specific commands issued to the hub’s internal Hub Feature Controller device. External SPI Memory Device: If a custom firmware image is being used and executed from an attached SPI memory device, the configuration registers may also be configured within the SPI image. This method mimics the OTP configuration method and is referred to as “pseudo-OTP.”
USB7202, USB7206, USB725x
Application Notes & Source Code
 Last Updated
Silicon Products