The PM4358 COMET-OCTAL device is an Eight-channel T1/E1/J1 framer with integrated analog Line Interface Unit (LIU). The COMET-OCTAL provides a common Framer and LIU solution platform for all major worldwide formats. In a compact 17mm by 17mm package, the device provides complete line side integration, software-selectable redundancy for 1:1 protection, software-selectable framing for three global primary rate framing formats (T1/E1/J1) and support for short-haul and long-haul analog line interfaces.

The COMET-OCTAL enhances system reliability by enabling customers to implement software selectable 1:1 protection for redundant applications with no additional board components. In a redundant application, a standby T1/E1/J1 interface is used to protect an active link, allowing a quick recovery in case of line failures. The device also autonomously generates periodic performance reports, which reduce the software overhead associated with meeting T1 Standards in high-density designs.

Applications
• Wireless Base Transceiver Station and Digital Loop Carrier (DLCs)
• Enterprise Router
• DSLAM
• PON Optical Network Unit (ONU)
• Integrated Access Device (IAD)
• Voice Gateway
• Channel and Data Service Units (CSU/DSU)
• Digital Private Branch Exchanges (PBX)
• Test Equipment

• Programmable integrated termination: T1 100O, J1 110O, E1 120O, E1 75O
• Internal support for redundancy (Y-cable) applications
• Small footprint 256-pin fine pitch CABGA (17 mm by 17 mm) package
• Low power dissipation of 165 mW per channel
• 100% pin and software compatible with PM4359 COMET TETRA , software compatible with PM4351 COMET and PM4354 COMET QUAD
• Software selectable between T1/J1 and E1 operation on a per device basis
• Provides digitally programmable longhaul and shorthaul pulse templates and line build out
• Meets or exceeds T1/J1 and E1 shorthaul and longhaul network access specifications including ANSI T1.102, T1.403, T1.408, AT&T TR 62411, ITU-T G.703, G.704 as well as ETSI 300-011, CTR-4, CTR-12 and CTR-13
• Provides an 8-bit microprocessor bus interface or SPI compatible hardware only interface for configuration, control, and status monitoring
• Provides transmit and receive jitter attenuation
• Provides eight full-featured HDLC controllers, each with 128-byte transmit and receive FIFO buffers
• Provides a two-frame payload slip buffer to allow independent backplane and line timing
• Automatically generates and transmits DS-1 performance report messages to ANSI T1.231 and ANSI T1.408 specifications
• Provides PRBS generators and detectors on each tributary for error testing at DS1, E1 and N x 64 Kbit/s rates as recommended in ITU-T O.151 and O.152
• Provides encoding and decoding of B8ZS, HDB3 and AMI line codes
• Provides receive equalization, clock recovery and line performance monitoring
• Uses line rate system clock
• Provides an IEEE P1149.1 (JTAG) compliant test access port (TAP) and controller for boundary scan test
• Implemented in a low power 1.8/3.3 V CMOS technology
• Provides a -40 ºC to +85 ºC industrial temperature operating range