EERAM is an SRAM that doesn't
lose its content on a power disruption. Inside each memory cell,
transparent to the user, are nonvolatile transistors that capture the SRAM
content and hold it through power loss events. On power restore, the SRAM
is reloaded with its last content and SRAM operation can continue.
8,192 x 8 bit Serial SRAM with internal nonvolatile data backup
I2C Interface: Up to 3MHz with Schmitt trigger inputs for noise suppression
Low-Power CMOS Technology: Active current: 5 mA (maximum); Standby current: 500 μA (maximum); Hibernate current: 3 μA (maximum)
Cell-Based Nonvolatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time)
Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, SRAM automatically restored on VCC return
100,000 Backups Minimum (at 20°C)
100 years retention (at 20°C)
Operating Voltage Range: 2.7V-3.6V
Temperature Range Industrial (I) -40 to 85ºC, Extended (E) -40 to 125ºC
The High-Density EERAM PICtail™ Kit demonstrates the features and abilities of the 48LM01 SPI and 47L64 I²C EERAM devices in standard development platforms. By designing with these daughter boards with the PICtail Plus and mikroBUS™ connectors, they will operate with the Explorer 8 Development Board, the Explorer 16/32 Development Board, and many other tools. Package contents...