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RISC-V® for PolarFire® FPGAs Course

Course Details 

RISC-V for PolarFire FPGAs is a one-day course for engineers who are implementing RISC-V designs targeting PolarFire FPGAs. The class introduces the RISC-V Instruction Set Architecture (ISA), Microchip's RISC-V offerings and the RISC-V ecosystem. The class describes how to implement and debug RISC-V designs with hands-on lab exercises that use the PolarFire FPGA Splash Kit to provide practical applications of the material presented.

Location

This class is held at Microchip's facility located on North First Street in San Jose, CA. Students who are unable to travel to San Jose can attend remotely via the web.

Course Objectives 

  • Implement a RISC-V design targeting the PolarFire FPGA family
  • Develop and debug firmware applications using Microchip's free SoftConsole software development environment

Course Requirements 

Registration 

Enroll for the course by completing the registration materials. Available dates are presented on the registration page.

Register