Mobile Industry Processor Interface (MIPI) Display Serial Interface (DSI) TX IP interfaces with a video timing generator on the input side and an IOD block on the output side to drive a command mode display. The DSI IP transmitter encodes the pixel data compliant to the MIPI DSI standard. This IP Core supports 4 lanes RGB-888 and YCbCr-422 data types and operates in two modes on the physical layer - high-speed mode and low-power mode. In high-speed mode, MIPI DSI supports the transmission of image data using short and long packets. Short packets are used to send control information, and long packets are used to send video content on the DSI lanes. For video data, one long packet is equivalent to one image data line.
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Features and Benefits
- Supported Data Format:
- Supports 24-bit format for RGB-888 and 16-bit format for YCbCr 4:2:2 for 4-lane configuration.
- Pixel-to-Byte Data Conversion:
- Converts video pixel data into byte format for transmission over DSI high-speed lanes, with automatic clock domain handling.
- Intelligent Packet Formation:
- Automatically creates and formats data packets according to the MIPI DSI standard, including video and control commands.
- Built-in Display Initialization:
- Sends essential display setup commands before video transmission begins.
- Protocol-Compliant Data Transmission:
- Supports standard DCS (Display Command Set) commands for memory write operations to display frame buffer.
- Real-Time Display Control:
- Provides a ready signal to coordinate video data flow and ensure stable image output without glitches.
- Reliable Data Integrity:
- Adds error correction and checks (ECC and CRC) to ensure robust and error-free data transmission.
Licensing Options
Free with any Libero License
Documentation
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| Microchip_UG0948_PolarFire_MIPI_DSI_Transmitter_User_Guide_V2.pdf | Download |