We detect you are using an unsupported browser. For the best experience, please visit the site using Chrome, Firefox, Safari, or Edge. X
Maximize Your Experience: Reap the Personalized Advantages by Completing Your Profile to Its Fullest! Update Here
Stay in the loop with the latest from Microchip! Update your profile while you are at it. Update Here
Complete your profile to access more resources.Update Here!

Core1553BRT


Core1553BRT provides a complete, dual-redundant MIL-STD-1553B remote terminal (RT), apart from the transceivers required to interface to the bus. It simply provides a set of memory-mapped subaddresses that "receive data written to" or "transmit data read from." The core can be configured to connect directly to synchronous or asynchronous memory devices. Alternatively, the core can directly connect to backend devices, removing the need for memory buffers. If memory is used, the core requires 2,048 words of memory, which can be shared with the local CPU.


Features and Benefits


  • Single-Chip, Radiation Tolerant MIL-STD-1553B Compliant FPGA Solution
  • Fail Safe State Machines for Space and Avionics Applications
  • 100% Statement and Branch Code Coverage
  • Selectable 12, 16, 20 or 24 MHz System Clocks
  • APB3 version interface enables simple connection to APB-based processor systems
  • Interfaces to Standard External 1553B Transceivers
  • Documentation


    Title
    Core1553BRT v4.1 Handbook Download