CoaXpress

The CoaXPress IP core implements the transport layer used to connect industrial cameras and frame grabbers across a coaxial link in FPGA-based vision systems. It fits designs that need to move image streams in one direction while carrying control traffic and trigger signaling in the opposite direction over the same cable. By providing both host and device implementations, the core supports complete endpoint development for camera-side and frame-grabber-side architectures. Its packet-based design separates image streaming, control access, and real-time trigger handling into dedicated logical channels, which simplifies system partitioning and software interaction. The core also helps designers bridge image sensors, processing pipelines, memory subsystems, and display or capture hardware without building a custom transport layer. Built-in handling for packet formatting, packet extraction, acknowledgments, and link checking reduces development effort and improves interoperability with CoaXPress equipment. Support for dynamic downconnection data-rate switching and configurable stream mapping allows the same core to adapt to different imaging architectures. The result is a practical foundation for embedded machine vision, inspection, medical imaging, and other camera-to-host systems where deterministic control and robust image transport are both essential.