How to Debug Microchip's SoC FPGA Designs Using SoftConsole | Videos
How to Debug Microchip's SoC FPGA Designs Using SoftConsole
This video briefly introduces Microchip’s MiV soft RISC-V processing cores, their debug circuitry, and a simple design implementation. The video then demonstrates using SoftConsole IDE software development environment to debug the cores while running on hardware.
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{"SalesForceSecurePath":"https://microchip.my.salesforce-scrt.com","EmbeddedServiceName":"Messaging_For_Microchip","SalesForcePath":"https://microchip.my.site.com/ESWMessagingForMicrochi1755319480924","AgentAvailableHeader":"No problem. Chat with our engineering experts or schedule a call that's convenient for you.","ScheduleCallUrl":"https://microchip.my.site.com/schedulemeetingportal/s/","SalesforceOrgId":"00Do0000000KAkK","JsUrl":"https://microchip.my.site.com/ESWMessagingForMicrochi1755319480924/assets/js/bootstrap.min.js"}