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LAN91C111

10/100 Base-T/TX Ethernet Controller with 16/32 Bit Interface

Status: In Production

Features:

  • Single Chip Ethernet Controller
  • Dual Speed - 10/100 Mbps
  • Fully Supports Full Duplex Switched Ethernet
  • Supports Burst Data Transfer
  • 8 Kbytes Internal Memory for Receive and Transmit FIFO Buffers
  • Enhanced Power Management Features
  • Optional Configuration via Serial EEPROM Interface
  • Supports 8, 16 and 32 Bit CPU Accesses
  • Internal 32 Bit Wide Data Path (into Packet Buffer Memory)
  • Built-in Transparent Arbitration for Slave Sequential Access Architecture
  • Flat MMU Architecture with Symmetric Transmit and Receive Structures and Queues
  • 3.3V Operation with 5V Tolerant I/O Buffers
  • Single 25 MHz Reference Clock for Both PHY and MAC
  • External 25 MHz Output Pin for an External PHY Supporting PHY''s Physical Media
  • Low Power CMOS Design
  • ARM
  • SH
  • Power PC
  • Coldfire
  • 680X0, 683XX
  • MIPS R3000
  • 3.3V MII (Media Independent Interface) MAC-PHY Interface Running at Nibble Rate
  • MII Management Serial Interface
  • 128 Pin QFP RoHS compliant package
  • 128 Pin TQFP 1.0 mm height RoHS compliant package
  • Commercial Temperature Range from 0°C to 70°C (LAN91C111)
  • Industrial Temperature Range from -40°C to 85°C (LAN91C111i)
  • Fully Integrated IEEE 802.3/802.3u - 100BASE-TX/10BASE-T Physical Layer
  • Auto Negotiation: 10/100, Full/Half Duplex
  • On Chip Wave Shaping - No External Filters Required
  • Adaptive Equalizer
  • Baseline Wander Correction
  • Link
  • Activity
  • Full Duplex
  • 10/100
  • Transmit
  • Receive
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Overview
Documents
Development Environment
Similar Devices
RoHS Information
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Device Overview

Summary

The Microchip LAN91C111 is designed to facilitate the implementation of a third generation of Fast Ethernet connectivity solutions for embedded applications. For this third generation of products, flexibility and integration dominate the design requirements. The LAN91C111 is a mixed signal Analog/Digital device that implements the MAC and PHY portion of the CSMA/CD protocol at 10 and 100 Mbps. The design will also minimize data throughput constraints utilizing a 32-bit, 16-bit or 8-bit bus Host interface in embedded applications.

The total internal memory FIFO buffer size is 8 Kbytes, which is the total chip storage for transmit and receive operations.

The Microchip LAN91C111 is software compatible with the LAN9000 family of products.


*The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.

For product comparison, please consider: LAN9218

Additional Features

    Features

    • Single Chip Ethernet Controller
    • Dual Speed - 10/100 Mbps
    • Fully Supports Full Duplex Switched Ethernet
    • Supports Burst Data Transfer
    • 8 Kbytes Internal Memory for Receive and Transmit FIFO Buffers
    • Enhanced Power Management Features
    • Optional Configuration via Serial EEPROM Interface
    • Supports 8, 16 and 32 Bit CPU Accesses
    • Internal 32 Bit Wide Data Path (into Packet Buffer Memory)
    • Built-in Transparent Arbitration for Slave Sequential Access Architecture
    • Flat MMU Architecture with Symmetric Transmit and Receive Structures and Queues
    • 3.3V Operation with 5V Tolerant I/O Buffers
    • Single 25 MHz Reference Clock for Both PHY and MAC
    • External 25 MHz Output Pin for an External PHY Supporting PHY's Physical Media
    • Low Power CMOS Design
    • Supports Multiple Embedded Processor Host Interfaces
      • ARM
      • SH
      • Power PC
      • Coldfire
      • 680X0, 683XX
      • MIPS R3000
    • 3.3V MII (Media Independent Interface) MAC-PHY Interface Running at Nibble Rate
    • MII Management Serial Interface
    • 128 Pin QFP RoHS compliant package
    • 128 Pin TQFP 1.0 mm height RoHS compliant package
    • Commercial Temperature Range from 0°C to 70°C (LAN91C111)
    • Industrial Temperature Range from -40°C to 85°C (LAN91C111i)

    Network Interface

    • Fully Integrated IEEE 802.3/802.3u - 100BASE-TX/10BASE-T Physical Layer
    • Auto Negotiation: 10/100, Full/Half Duplex
    • On Chip Wave Shaping - No External Filters Required
    • Adaptive Equalizer
    • Baseline Wander Correction
    • LED Outputs (User Selectable - Up to Two LED Functions at One Time)
      • Link
      • Activity
      • Full Duplex
      • 10/100
      • Transmit
      • Receive
Parametrics
Name
Value
Description
10Base-T/100Base-TX Ethernet Controller with 16/32 bit interface
Ethernet Bandwidth
10/100Mbps
MAC
Yes
PHY
Yes
TX/RX RAM Buffer(Bytes)
8K
Interrupt Pin
1
LEDs
2
# Ethernet Ports
1
Temp. Range Min. (°C)
-40
Temp. Range Max. (°C)
85
Interface
16-bit or 32-bit
Vdd I/O (V)
3.3

Documents

Jump to:

IBIS

06/02/2003
288KB
02/22/2005
276KB
02/16/2007
268KB

Development Environment

  • Software Libraries
Software Libraries
LAN9000 Diagnostic and Setup Utilities (ETX, ISMC9000, MIIPHY, CIS and ENABLERS

LAN9000 Diagnostic and Setup Utilities (ETX, ISMC9000, MIIPHY, CIS and ENABLERS

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LAN91C111 DOS ODI Driver Version 4.5

LAN91C111 DOS ODI Driver Version 4.5

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LAN91C111 Linux Driver Version 2.03 Source

LAN91C111 Linux Driver Version 2.03 Source

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LAN91C111 Packet Driver Version 1.2C

LAN91C111 Packet Driver Version 1.2C

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LAN91C111 VxWorks Driver Version 2.1

LAN91C111 VxWorks Driver Version 2.1

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LAN91C111 Windows 98 Driver Version 3.12B

LAN91C111 Windows 98 Driver Version 3.12B

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LAN91C111 Windows CE Driver 5.04/4.x for X86

LAN91C111 Windows CE Driver 5.04/4.x for X86

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LAN91C111 Windows CE Driver Version 3.0

LAN91C111 Windows CE Driver Version 3.0

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LAN91C111 Windows XP Embedded Driver Version 5.1.1.0

LAN91C111 Windows XP Embedded Driver Version 5.1.1.0

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SRC-111-CENET Source Code

SRC-111-CENET Source Code

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SRC-111-CENET86 Source Code

SRC-111-CENET86 Source Code

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SRC-111-CENETXS Source Code

SRC-111-CENETXS Source Code

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SRC-111-NDIS Source Code

SRC-111-NDIS Source Code

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SRC-111-PKT Source Code

SRC-111-PKT Source Code

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SRC-111-VX Source Code

SRC-111-VX Source Code

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SRC-111-XP Source Code

SRC-111-XP Source Code

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
LAN91C111-NS
1.806400
6.803030
128
QFP
14x20x2.7
Matte Tin
e3
LAN91C111I-NS
1.806400
6.803030
128
QFP
14x20x2.7
Matte Tin
e3
LAN91C111-NU
0.557500
1.800000
128
TQFP
14x14x1mm
Matte Tin
e3
LAN91C111I-NU
0.557500
1.800000
128
TQFP
14x14x1mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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