The PolarFire® SoC family delivers industry-leading power efficiency, excellent thermal performance and defense-grade security for intelligent, connected systems. Built around a deterministic, coherent RISC-V CPU cluster with deterministic L2 memory subsystem, this family of devices enables seamless development of Linux® and real-time applications.
The PolarFire SoC family now includes cost-optimized PolarFire Core SoC FPGAs devices for applications that don’t require high-speed serial transceivers. These new SoC FPGAs offer up to 460K logic elements and combine embedded RISC-V processing with a wide range of logic densities, packaging options, fast I/O and configuration flexibility to meet diverse performance, power and cost requirements.
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PolarFire SoC Delphi Compact Thermal Model | 30 Jan 2025 | |
PolarFire SoC Material Declaration Data Sheet | 15 Apr 2025 | |
PolarFire® SoC Datasheet | 13 May 2025 | |
PD3068: Package Mechanical Drawings Datasheet | 17 Apr 2025 | |
PolarFire SoC MSS Technical Reference Manual | 16 May 2025 | |
PolarFire SoC FPGA Register Map | 31 May 2024 |
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PolarFire SoC FPGA Engineering Samples (ES) Devices Errata | 16 Jul 2020 | |
PolarFire® SoC FPGA Production Devices Errata | 26 Jun 2024 | |
PolarFire SoC FPGA Production Devices Errata | 30 Aug 2024 |
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PolarFIre SoC Dedicated IO IBIS Model (AUTO) | 30 Mar 2022 | |
PolarFire SoC Dedicated IO IBIS Model (Industrial) | 30 Mar 2022 | |
PolarFire SoC MSSIO IBIS Model (Industrial) | 14 Dec 2023 | |
PolarFire SoC HSIO IBIS Model (Industrial) | 14 Dec 2023 | |
PolarFire SoC HSIO IBIS Model (Military) | 14 Dec 2023 | |
PolarFire SoC GPIO IBIS Model (Industrial) | 14 Dec 2023 | |
PolarFire SoC Dedicated IO IBIS Model (Military) | 30 Mar 2022 | |
PolarFire SoC GPIO IBIS Model (Military) | 14 Dec 2023 | |
PolarFire SoC HSIO IBIS Model (Auto) | 14 Dec 2023 | |
PolarFire SoC GPIO IBIS Model (Auto) | 14 Dec 2023 | |
PolarFire SoC MSSIO IBIS Model (Auto) | 14 Dec 2023 | |
PolarFire SoC MSSIO IBIS Model (Military) | 14 Dec 2023 | |
PolarFire SoC & PolarFire FPGA IBIS AMI Model | 26 Feb 2025 |
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PolarFire SoC MPFS250 FCV484 TX S-parameter Model | 07 Feb 2023 | |
PolarFire SoC MPFS250 FCV484 RX S-parameter Model | 07 Feb 2023 |
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PolarFire SoC Delphi Compact Thermal Model | 30 Jan 2025 |
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PolarFire SoC Validation Reports | 15 May 2025 | Link |
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PolarFire FPGA and PolarFire SoC FPGA Power Estimator User Guide | 09 Dec 2019 | |
PolarFire Family Memory Controller User Guide | 23 May 2025 | |
Memory Log Analyzer GUI Installer | 16 Feb 2025 | |
PolarFire , PolarFire SoC and RT PolarFire FPGA Power Estimator | 20 Feb 2025 |
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PolarFire® FPGAs and SoC FPGAs | 05 Jun 2024 | |
FPGA and SoC Brochure | 13 Jun 2023 | |
Mi-V RISC-V Ecosystem Brochure | 14 Feb 2024 | |
PolarFire® SoC Product Overview | 21 May 2025 |
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PolarFire SoC Icicle Kit Mechanical Drawing | 30 Mar 2022 | |
PolarFire SoC Icicle Kit Schematics | 19 Aug 2020 | |
MPFS-ICICLE-KIT-ES_Board_Files | 19 Aug 2020 | |
PolarFire SoC FPGA Board Design Guidelines User Guide | 22 Aug 2024 | |
MPFS-ICICLE-KIT-ES_User Guide | 17 Dec 2024 |
PolarFire SoCs are offered with multiple speed grades, temperatures, and package combinations. All temperatures are specified as junction temperatures. The following illustration shows the ordering information.
The Mi-V RISC-V Ecosystem is a comprehensive suite of tools and solutions co-developed by Microchip and industry partners to accelerate RISC-V adoption on PolarFire SoC FPGAs.
The PolarFire SoC FPGA family offers scalable, flexible solutions for power-efficient, real-time compute in a variety of applications. Devices span a range of logic densities and package options to support diverse system requirements. Our PolarFire Core SoC FPGAs are cost-optimized variants that do not include high-speed SerDes and PCIe® endpoint/root port capabilities.
Notes:
Whether you're developing cutting-edge embedded systems, exploring RISC-V®-based architecture or building AI/ML applications, you can refer to this page for resources such tools, software frameworks, design examples and documentation that are available to you on GitHub
PolarFire SoCs combine a deterministic, coherent RISC-V CPU cluster with an L2 memory subsystem for real-time and Linux® applications. Explore comprehensive documentation, reference designs and development tools on GitHub to kick-start your development journey
Browse tools and IP cores for RISC-V soft CPUs on Microchip FPGAs with support for Libero® SoC Design Suite and SoftConsole.
VectorBlox SDK empowers AI/ML developers with tools for efficient Convolutional Neural Network (CNN) inference on PolarFire FPGAs and PolarFire SoC FPGAs. Access development tools, detailed documentation and practical examples on GitHub for your vision projects.
SmartHLS compiler enables high-level synthesis for PolarFire FPGA and PolarFire SoC FPGA designs, allowing you to write in C++ and convert C++ code into optimized RTL. Get started with tools, examples and guides on GitHub.
The PolarFire SoC Icicle Kit runs Linux® out of the box and evaluates the microprocessor (MPU) subsystem, FPGA fabric, PCIe®, Gigabit Ethernet, CAN, USB and more.
The PolarFire SoC Video Kit is a full-featured embedded vision development platform targeting secure, reliable and power-efficient vision applications at the edge, including our VectorBlox™ Accelerator SDK and Neural Network IP, and Industrial IoT (IIoT) and automation applications.
The PolarFire SoC Discovery Kit is a low-cost, open-source development kit powered by a quad-core, RISC-V application-class processor. This device supports Linux® and real-time applications, a rich set of peripherals and 95K low-power, high-performance FPGA logic elements.
Key features:
Key features:
Key features:
Key features:
Key features:
Key features:
Key features:
Key features:
This latest-generation programmer supports the Windows® and Linux® operating systems in conjunction with Libero® SoC Design Suite, FlashPro Express and SmartDebug software.
This fifth-generation programmer supports Windows and Linux environments.
This fourth-generation hardware programmer supports only Windows environments.
ChipPro is a quick and easy device programming solution for our FPGA devices.
An optional In-House Programming (IHP) service is available if you are purchasing our devices in large volumes.
The PolarFire SoC Microprocessor Subsystem (MSS) configurator is a software tool to configure the PolarFire SoC microprocessor subsystem.
Libero SoC Design Suite offers high productivity with its comprehensive, easy-to-learn, easy-to-adopt development tools for designing with our FPGA device families.
SoftConsole is a software development environment for the rapid development of bare metal- and RTOS-based C/C++ software.
This video provides an overview of key repositories, tools and documentation in GitHub to help you get started.
Learn to run and debug a bare metal app on the Icicle Kit using MMUART ports.
Configure the core, adjust memory and integrate with HSS for smooth operation.
Build HSS, program eMMC and boot a bare metal app from DDR memory.
Create a custom Linux image, control GPIOs and interact with LEDs.
Build, debug and program a bare metal app for FPGA fabric using key tools.
Use drivers to build custom Linux® distributions and control MSS GPIOs and fabric LSRAM.
Learn how to create a design in Libero® SoC Design Suite, integrate APB interface-based IP and use SDIO registers.
Set up and access a PCIe NVMe™ drive from Linux® on the Icicle Kit.
Use MPFS GPIO and UART examples to handle interrupts in a bare metal application.
Learn Smart Debug features for FPGA and SoC debugging, including live probes and memory views.
Add and program custom packages to a Yocto image for testing on the Icicle Kit.
Visit our technical support portal If you need assistance with your PolarFire SoC FPGA-based design.
Try our discussions forum on our GitHub page. Browse the available database of questions and answers, post your questions and support others in the discussions.