is a 3.3V (5V Tolerant) PC99a/PC2001 compliant Docking I/O controller. The
device implements the LPC interface, includes I/O functionality.
LPC47N237’s LPC interface supports LPC I/O and DMA cycles. There is also an
SMBus hosted GPIO Block.
legacy I/O included in the LPC47N237 are: a 16C550A compatible UART; one
Multi-Mode parallel port including ChiProtectTM circuitry
plus EPP and ECP. The parallel port is compatible with IBM PC/ATTM architecture,
as well as IEEE 1284, EPP and ECP. LPC47N237 incorporates sophisticated power
control circuitry (PCC) which includes support for PME. PCC supports
multiple low power-down modes. The I/O Address, DMA Channel and hardware
IRQ of each logical device in the LPC47N237 may be reprogrammed through
the internal configuration registers.
Family parts LPC47N237-MT
32 GPIO Pins
100 TQFP Package
3.3V Operating Voltage
LPC I/O and DMA Cycles
1 16C550A Compatible UART
1 Multi-Mode Parallel Port with ChiProtectTM, EPP and ECP