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SY89823L

Status: In Production

Features:

  • 22 differential HSTL (low-voltage swing) output pairs
  • HSTL outputs drive 50Ω to ground with no offset voltage
  • 3.3V core supply, 1.8V output supply for reduced power
  • LVPECL and HSTL inputs
  • Low part-to-part skew (200ps max.)
  • Low pin-to-pin skew (50ps max.)
  • Triple-buffered output enable (OE)
  • -40°C to +85°C temperature range
  • Available in a 64-pin EPAD-TQFP
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The SY89823L is a high-performance bus clock driver with 22 differential High-Speed Transceiver Logic (HSTL), 1.5V compatible output pairs. The device is designed for use in low-voltage (3.3V/1.8V) applications that require a large number of outputs to drive precisely aligned, ultra-low skew signals to their destination. The input is multiplexed from either HSTL or Low-Voltage Positive- Emitter-Coupled Logic (LVPECL) by the CLK_SEL pin.The Output Enable (OE) is synchronous and triple-buffered so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any potential of generating a runt clock pulse when the device is enabled/disabled, as can occur with an asynchronous control. The triple-buffering feature provides a threeclock delay from the time the OE input is asserted/de-asserted to when the clock appears at the outputs.The SY89823L features low pin-to-pin skew (50ps max.) and low part-to-part skew (200ps max.), performance previously unachievable in a standard product having such a high number of outputs. The SY89823L is available in a single, space-saving package, enabling a lower overall cost solution.

Additional Features
    • 22 differential HSTL (low-voltage swing) output pairs
    • HSTL outputs drive 50Ω to ground with no offset voltage
    • 3.3V core supply, 1.8V output supply for reduced power
    • LVPECL and HSTL inputs
    • Low part-to-part skew (200ps max.)
    • Low pin-to-pin skew (50ps max.)
    • Triple-buffered output enable (OE)
    • -40°C to +85°C temperature range
    • Available in a 64-pin EPAD-TQFP
Parametrics
Name
Value
Product Type
Fanout & Buffer and Drivers
Description
2:22
Input
LVPECL/HSTL
Output
HSTL
Supply Voltage
3.3
Max Freq (GHz)
0.5
Max Prop Delay (ps)
1700
Icc (mA)
115
Max Within Device Skew (ps)
50
OE
True
RPE
False
FSI
False
Input Mux
True
Input EQ
False
Output Type
HSTL

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (Kg)
Lead Count
Package Type
Package Dimension
Solder Composition
JEDEC Indicator
RoHS
China EFUP
SY89823LHY-TR
0.261300
0.904600
64
TQFP
10x10x1.0mm
Matte Tin
e3
SY89823LHY
0.261300
1.607500
64
TQFP
10x10x1.0mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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