Status: End of Life
Many of today’s high performance FPGA’s, microprocessors, DSP and industrial/embedded subsystems require sequencing of the input power. Historically this has been accomplished by: i) discretely using comparators, references & RC circuits; ii) using expensive programmable controllers; or iii) with low voltage sequencers requiring resistor drop downs and several high voltage optocoupler or level shift components. The PS10 saves board space, improves accuracy, eliminates optocouplers or level shifts and reduces overall component count by combining four timers, programmable input UV/OV supervisors, a programmable POR, and four 90V open drain outputs. A high reliability, high voltage, junction isolated process allows the PS10 to be connected directly across the high voltage input rails. The power-on-reset interval (POR) may be programmed by a capacitor on CRAMP. To sequence additional systems, multiple PS10s may be daisy-chained together. If at any time the input supply falls outside the UV/OV detector range, the PWRGD outputs will immediately become IN-ACTIVE. The PS10 is available in a space saving 14-Lead SOIC package.
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