Microchip logo
  • All
  • Products
  • Documents
  • Applications Notes
product primary image

PM40068

PFX 68xG4 Gen 4 Fanout PCIe Switch

Status: In Production

Features:

  • High-reliability PCIe with robust error containment, hot- and surprise-plug controllers per port, end-to-end data integrity protection, high-quality, low-power SERDES
  • Significant power, cost and board space savings with support for 36 ports,34 NTBs, and 18 virtual switch partitions and flexible *x1, x2, x4, x8, and x16 port bifurcation with no restrictions on configuring ports as either upstream or downstream, or on mapping ports to NTBs
  • Comprehensive diagnostics and debugging
  • Secure system solution with boot image authentication
View More
Overview
Documents
Development Environment
RoHS Information
Add To Cart

Device Overview

Summary

The Switchtec Gen 4 PM40068 PFX Fanout PCIe switch is a high reliability, high performance switch with significant power, cost, and board space supporting 68 lanes, 36 ports, and hot- and surprise-plug controllers for each port.  PFX switches features advanced error containment, comprehensive diagnostics and debug capabilities, end-to-end dat integrity protection, high-quality, low power SERDES and secure boot image authentication.

Typical applications for the PFX family include data center equipment, defense and industrial servers, workstations, test equipment, video production and broadcasting equipment, cellular infrastructure, access networks, metro networks and core networking.

For product comparison, please consider: PM40100, PM40084, PM40052, PM40036, PM40028

Additional Features
  • High-reliability PCIe with robust error containment, hot- and surprise-plug controllers per port, end-to-end data integrity protection, high-quality, low-power SERDES
  • Significant power, cost and board space savings with support for 36 ports,34 NTBs, and 18 virtual switch partitions and flexible *x1, x2, x4, x8, and x16 port bifurcation with no restrictions on configuring ports as either upstream or downstream, or on mapping ports to NTBs
  • Comprehensive diagnostics and debugging
  • Secure system solution with boot image authentication
  • High-Performance Non-blocking Switches
    • 68-lane variant
    • Ports bifurcate to ×1*/×2/×4/×8/×16 lanes
    • Up to 34 NTBs assignable to any port
    • Logical non-transparent (NT) interconnect allows for larger topologies
    • Supports 1+1 and N+1 failover mechanisms
  • DMA Controller
    • High-performance, ultra-low latency DMA engine
  • Error Containment
    • Advanced error reporting (AER) on all ports
    • Downstream port containment (DPC) on all downstream ports
    • Completion timeout synthesis (CTS) to prevent an error state in an upstream host due to incomplete non-posted transactions
    • Hot- and surprise-plug controllers per port
    • GPIOs configurable for different cable/connector standards
  • PCIe Interfaces
    • Passive, managed, and optical cables
    • SFF-8644, SFF-8643, SFF-8639, OCuLink and other connectors
  • Diagnostics and Debug
    • Real-time eye capture
    • External loopback
    • Errors, statistics, and performance counters
  • Peripheral I/O Interfaces
    • Up to 11 Two-Wire Interfaces (TWIs) with SMBus support
    • Up to 4 SFF-8485-compliant SGPIO ports
    • 10/100 Ethernet MAC port (MII/RMII)
    • Up to 4 UARTs
    • JTAG and EJTAG interface
  • High-Speed I/O
    • PCIe Gen 4 16 GT/s
    • Supports OCuLink cabling, CEM ×16 slots, and other interfaces
    • Manual PHY configuration for optical
    • Power Management
    • Active State Power Management (ASPM)
    • Software-controlled power management
  • ChipLink Diagnostic Tools
    • Extensive debug, diagnostics, configuration, and analysis tools with an intuitive GUI
    • Access to configuration data, management capabilities, and signal integrity analysis tools (such as real-time eye capture)
  • Evaluation Kit
    • The PM42100-KIT Switchtec Gen 4 PCIe switch evaluation kit is a device evaluation environment that supports multiple interfaces
  • *x1 natively on four lanes
Parametrics
Name
Value
Lanes
68
Ports
36
NTBs
34
Hot Plug Controllers
36
Power Dissipation
29.3
Bandwidth
174

Documents

Jump to:

Supporting Collateral

Brochures


Development tools data is currently unavailable.


Rohs data is currently unavailable.

Buy from Microchip

Grid
View
Table
View
Filter:
Apply
Clear
Only show products with samples
Product
Leads
Package Type
Temp Range
Packing Media
5K Pricing
Buy