The DDR Write IP is designed to efficiently transfer continuous data streams into DDR memory, primarily targeting video applications. It writes incoming video frame data line-by-line into memory, enabling high-throughput storage of image frames for later processing or display. The IP works in conjunction with a video arbiter that converts write requests into AXI4 transactions. Internally, it performs data packing to convert pixel data into formats compatible with memory interfaces and uses FIFO buffering to manage clock domain differences and ensure smooth data flow. It supports multiple pixel widths and configurable video formats, allowing flexibility in handling different resolutions and color depths. The design also includes frame buffering mechanisms that distribute frames across multiple memory regions to enable efficient memory reuse and continuous streaming operation.
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Features and Benefits
- Video Frame Write Support
- Writes horizontal video lines to DDR
- Frame-based addressing scheme
- High-Speed Data Handling
- Continuous burst write support
- FIFO-based buffering
- Flexible Interfaces
- AXI4 Stream interface
- Video arbiter integration
- Configurable Formats
- Multiple pixel widths (8–56 bits)
- Supports different resolutions
- Efficient Memory Usage
- Multi-frame buffer cycling
- Address offset-based writes
Licensing Options
Free with all Libero license
Documentation
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| DDR Write IP User Guide | Download |