CoreApbNvm allows advanced microcontroller bus architecture (AMBA) Peripheral Bus (APB) access to the Microchip Fusion® nonvolatile memory (NVM), using a simple register-based access scheme. The core is designed to be configurable for use in various applications, using variable APB bus widths and a number of NVM instances (where supported).
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Features and Benefits
- Configurable APB address width in range of 8 to 32 bits
- Init/Config block for fetching data from NVM to RAM, primarily for CoreABC soft-mode initialization
- Remapping function via Init/Config block to load RAM from different addresses of NVM
- Register controlled auto increment mode
Licensing Options
Free with any Libero license
Documentation
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| CoreApbNvm Handbook | Download |