Schematic Design Entry using SmartDesign in Libero® SoC | Videos
Schematic Design Entry using SmartDesign in Libero® SoC
Learn how to enter an FPGA hardware design using Microchip’s SmartDesign schematic design entry tool. This video provides an overview of the SmartDesign tool and shows you how to instantiate cores, components, and user HDL files onto the graphical SmartDesign canvas to efficiently build, connect, and create your FPGA design.
Libero SoC Website: https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/fpga/libero-software-later-versions
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{"SalesForceSecurePath":"https://microchip.my.salesforce-scrt.com","EmbeddedServiceName":"Messaging_For_Microchip","SalesForcePath":"https://microchip.my.site.com/ESWMessagingForMicrochi1755319480924","AgentAvailableHeader":"No problem. Chat with our engineering experts or schedule a call that's convenient for you.","ScheduleCallUrl":"https://microchip.my.site.com/schedulemeetingportal/s/","SalesforceOrgId":"00Do0000000KAkK","JsUrl":"https://microchip.my.site.com/ESWMessagingForMicrochi1755319480924/assets/js/bootstrap.min.js"}
