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Getting Started with SuperFlash® Technology

Microchip offers a wide range of NOR Flash products in a variety of bus interfaces, speeds, voltages and packages. Below are some things to consider when selecting a Flash solution:
NOR vs NAND Flash
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NOR and NAND Flash differ in the way connections are made between the individual memory cells. In NOR Flash, each cell is individually connected to the bit line in parallel. NAND Flash cells are connected in series to a bit line. The series connection reduces the amount of ground wires and bit lines resulting in a higher-density layout. For a given process technology and density, a NAND Flash memory is about 60% smaller than a NOR Flash memory. This provides a lower cost per bit than NOR Flash. However, NAND Flash does not provide a random-access external address bus. Therefore data can only be read in pages. This makes NAND Flash similar to data storage devices like hard disk drives and optical memory. On the other hand, NOR Flash is better suited for accessing program code such as a computer’s BIOS or firmware. NOR Flash memory is read similarly to random-access memory, which is perfect for execute-in-place applications.
NOR cells
NAND cells
 NANDNOR
Main ApplicationFile StorageCode execution
Storage capacityHighLow
XIP CapabilitiesNoYes
Cost per bitBetter 
Active PowerBetter 
Standby Power Better
Write SpeedGood 
Read Speed Good
Parallel vs. Serial SPI vs. Serial SQI™ Flash Devices
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Parallel vs. Serial SPI vs. Serial SQI™ Flash Devices


NOR Flash is available with either a serial or parallel bus interface. The choice of which bus to use is often dictated by the required data rates of the application as well as the amount of available I/O on the microcontroller and the board space available. With the ongoing demand for smaller and cheaper products, more designs are now being switched to a serial interface to reduce board space and component price. 

ParallelSerial SPI
Data ThroughputHighMedium
Pin Count32+8+
Package SizeLargeSmall
Power ConsumptionMediumLow
CostHignLow

Today’s microcontrollers are often bond pad-limited. This means that the size of the die is limited by the space needed for bond pads rather than for the microcontroller gates / circuitry. Eliminating bond pads results in a smaller die, increasing the amount of die on a wafer and resulting in reduced cost per die. Additionally, more pins increase the assembly and packaging costs of both the microcontroller and the memory. This is why there has been a major shift from using parallel Flash to using serial Flash. However, switching to fewer pins means lower data throughput. In order to offset this, a quad I/O serial interface is being used in the latest serial devices to create SQI™ Flash devices.

What Are SQI™ Flash Devices?
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SQI Flash Devices

Data Rate Table
Serial Quad I/O™ (SQI) Flash devices read and write through a 4-bit multiplexed synchronous serial communication interface, which enables true low pin-count, high-bandwidth code XIP applications. The firmware commands are very similar to those of SPI, but with 4-bit I/O instead of single-bit I/O. Therefore, this interface provides approximately 4-times the data throughput of SPI. Compared to parallel Flash devices, SQI Flash devices provide very fast performance without requiring large, expensive and high pin-count packages.
What is Common Flash Memory Interface (CFI)?
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Common Flash Memory Interface (CFI)

Common Flash Memory Interface is an open standard approved by JEDEC. The goal of the standard is to allow interchangeability between Flash memory devices from different manufacturers of parallel Flash products. Each manufacturer’s memory has differences in performance specifications, memory maps and features. The standard allows for this identifying information to be read out of a table of values stored on the Flash device. The benefit of using this standard is that information about multiple Flash parts no longer needs to be stored in system software. This helps to future-proof the software and allows developers to use lower-cost Flash devices as they become available without needing to update their software.

What is Execution In Place (XIP)?
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Execution In Place (XIP)

Execution In Place refers to executing program code directly from external storage rather than copying it into RAM first. Running program code from external storage allows additional RAM to be freed up for dynamic data. For XIP to be possible, you must have random access capability, the appropriate memory mapping, and sufficient bandwidth. NOR Flash is well suited for execution in place whereas NAND Flash is not. Program code in NAND Flash must be copied into RAM before being executed.

What is Serial Flash Discoverable Parameters (SFDP)?
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Serial Flash Discoverable Parameters (SFDP)

The Serial Flash Discoverable Parameter (SFDP) standard is similar to the CFI standard for parallel Flash. The goal of this JEDEC approved standard is to allow interchangeability between Flash memory devices from different manufacturers. Each manufacturer’s memory has differences in performance specifications, memory maps, and features. The standard allows the use of a single driver which reads identifying information out of a table of values stored on the Flash device. The benefit of using this standard is that information about multiple Flash parts no longer needs to be stored in system software. This helps to future-proof the software and allows developers to use lower-cost Flash devices as they become available without needing to update their software.

Resources

Technical Briefs

TitleDate PublishedSize
SST25VF064C to SST26VF064B/064BA Migration11/05/14111 KB

Flash Development Tools

TitlePart NumberDescription
Serial SuperFlash® Kit 2AC243008The Serial SuperFlash® Kit 2 allows evaluation of Microchip's Serial Flash Devices which are made using the SST SuperFlash® technology.Buy Now
SQI SuperFlash® Kit 1AC243009The SQI SuperFlash Kit 1 contains three Serial Flash Daughter Boards.Buy Now
Parallel SuperFlash Technology Kit 1AC243006-1This evaluation kit contains two Parallel Flash PICtail™ Plus Daughter Boards which are designed to interface with the PICtail Plus connector on the Explorer 16 Development Board.Buy Now