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SY89825U

Status: In Production

Features:

  • LVPECL or LVDS input to 22 LVPECL outputs
  • 100K ECL compatible outputs
  • LVDS input includes 100Ω termination
  • >2GHz fMAX (toggle)
  • <35ps max. ch-ch skew
  • Low voltage operation: 2.5V, 3.3V
  • Temperature range: -40°C to +85°C
  • Output enable pin
  • Available in a 64-Pin EPAD-TQFP
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Overview
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Development Environment
RoHS Information
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Device Overview

Summary

The SY89825U is a High Performance Bus Clock Driver with 22 differential LVPECL output pairs. This part is designed for use in low voltage (2.5V, 3.3V) applications which require a large number of outputs to drive precisely aligned, ultra low skew signals to their destination. The input is multiplexed from either LVDS or LVPECL by the CLK_SEL pin. The LVDS input includes a 100Ω internal termination, thus eliminating the need for external termination. The Output Enable (OE) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This eliminates any chance of generating a runt clock pulse when the device is enabled/ disabled as can happen with an asynchronous control.The SY89825U features low pin-to-pin skew (35ps max.) --performance previously unachievable in a standard product having such a high number of outputs. The SY89825U is available in a single space saving package which provides a lower overall cost solution. In addition, a single chip solution improves timing budgets by eliminating the multiple device solution with their corresponding large part-to-part skew.

Additional Features
    • LVPECL or LVDS input to 22 LVPECL outputs
    • 100K ECL compatible outputs
    • LVDS input includes 100Ω termination
    • Guaranteed AC parameters over voltage:
      • >2GHz fMAX (toggle)
    • <35ps max. ch-ch skew
    • Low voltage operation: 2.5V, 3.3V
    • Temperature range: -40°C to +85°C
    • Output enable pin
    • Available in a 64-Pin EPAD-TQFP
Parametrics
Name
Value
Product Type
Fanout & Buffer and Drivers
Description
2:22
Input
LVPECL/LVDS
Output
LVPECL
Supply Voltage
2.5/3.3
Max Freq (GHz)
1
Max Prop Delay (ps)
1200
Icc (mA)
100
Max Within Device Skew (ps)
20
OE
True
RPE
False
FSI
False
Input Mux
True
Input EQ
False
Output Type
LVPECL

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (grams)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
SY89825UHY
0.261300
1.607500
64
TQFP
10x10x1.0mm
Matte Tin
e3
SY89825UHY-TR
0.261300
0.904600
64
TQFP
10x10x1.0mm
Matte Tin
e3
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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