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SY10EP51V

Status: In Production

Features:

  • 3.3V and 5V power supply options
  • 320ps typical propagation delay
  • Maximum frequency >3GHz typical
  • 75Ω internal input pulldown resistors
  • Transistor count: 143
  • Available in 8-Pin (3mm x 3mm) MSOP, SOIC and MLF®(2mm x 2mm) packages
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Overview
Documents
Development Environment
RoHS Information
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Device Overview

Summary

The SY10EP51V is a D flip-flop with reset and differential clock. The device is pin and functionally equivalent to the EL51 device.The reset input is an asynchronous, level triggered signal. Data enters the master portion of the flip-flop when CLK is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the CLK. The differential clock inputs of the EP51V allow the device to be used as a negative edge triggered flip-flop.The differential input employs clamp circuitry to maintain stability under open input conditions. When left open, the CLK input will be pulled down to VEE and the /CLK input will be biased a VCC/2.

Parametrics
Name
Value
Product Type
D Flip Flop
Description
D Flip-Flop with Reset and Differential Clock
Input
ECL
Output
ECL
Supply Voltage
3.3/5
Max Freq (GHz)
3
Max Prop Delay (ps)
320
OE
False
RPE
False
FSI
False
Input Mux
False
Input EQ
False
Channels
Single
Output Type
ECL

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RoHS Information

Part Number
Device Weight (g)
Shipping Weight (grams)
Lead Count
Package Type
Package Width
Solder Composition
JEDEC Indicator
RoHS
China EFUP
SY10EP51VKG-TR
0.025100
0.334700
8
MSOP
3x3mm
NiPdAu
e4
SY10EP51VKG
0.025100
0.124600
8
MSOP
3x3mm
NiPdAu
e4
SY10EP51VZG-TR
0.075000
0.250000
8
SOIC
3.90mm(.150in)
NiPdAu
e4
SY10EP51VZG
0.075000
0.163265
8
SOIC
3.90mm(.150in)
NiPdAu
e4
SY10EP51VMG-TR
0.010900
0.339227
8
VDFN
2x2x0.9mm
NiPdAu
e4
To see a complete listing of RoHS data for this device, please Click here
Shipping Weight = Device Weight + Packing Material weight. Please contact sales office if device weight is not available.

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